ParaNut SystemC Model
A SystemC Model of the ParaNut architecture
Public Member Functions | Public Attributes | Protected Attributes | List of all members
MWritePort Class Reference

#include <memu.h>

Inheritance diagram for MWritePort:
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Collaboration diagram for MWritePort:
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Public Member Functions

 MWritePort (sc_module_name name)
 
void Trace (sc_trace_file *tf, int level=1)
 
void TransitionMethod ()
 
void MainMethod ()
 

Public Attributes

sc_in< bool > clk
 
sc_in< bool > reset
 
sc_in< bool > port_wr
 
sc_in< bool > port_direct
 
sc_in< sc_uint< 4 > > port_bsel
 
sc_out< bool > port_ack
 
sc_out< bool > port_ac_w
 
sc_in< bool > port_trap_u
 
sc_in< bool > port_trap_no_u
 
sc_in< sc_uint< 3 > > port_cache_op
 
sc_in< sc_uint< 32 > > port_adr
 
sc_in< sc_uint< 32 > > port_data
 
sc_in< bool > port_lres_scond
 
sc_in< bool > port_scond_ok
 
sc_in< sc_uint< 32 > > busif_adr
 
sc_out< EBusIfOperationbusif_op
 
sc_out< bool > busif_nolinelock
 
sc_in< bool > busif_busy
 
sc_in< bool > busif_ac_w
 
sc_out< bool > tag_rd
 
sc_out< bool > tag_wr
 
sc_out< bool > bank_rd
 
sc_out< bool > bank_wr
 
sc_in< sc_uint< 32 > > bank_data_in
 
sc_out< sc_uint< 32 > > bank_data_out
 
sc_out< sc_uint< 4 > > bank_bsel
 
sc_in< SCacheTagtag_in
 
sc_out< SCacheTagtag_out
 
sc_out< bool > req_linelock
 
sc_out< bool > req_tagr
 
sc_out< bool > req_tagw
 
sc_out< bool > req_bank [CFG_MEMU_CACHE_BANKS]
 
sc_out< bool > req_busif
 
sc_in< bool > gnt_linelock
 
sc_in< bool > gnt_tagr
 
sc_in< bool > gnt_tagw
 
sc_in< bool > gnt_bank [CFG_MEMU_CACHE_BANKS]
 
sc_in< bool > gnt_busif
 

Protected Attributes

sc_signal< EWritePortStatestate_reg
 
sc_signal< int > state_trace
 
sc_signal< SCacheTagtag_reg
 
sc_signal< sc_uint< 32 > > data_reg
 
sc_signal< EWritePortStatenext_state
 
sc_signal< SCacheTagnext_tag_reg
 
sc_signal< sc_uint< 32 > > next_data_reg
 

Constructor & Destructor Documentation

◆ MWritePort()

MWritePort::MWritePort ( sc_module_name  name)
inline

Member Function Documentation

◆ MainMethod()

void MWritePort::MainMethod ( )

◆ Trace()

void MWritePort::Trace ( sc_trace_file *  tf,
int  level = 1 
)

◆ TransitionMethod()

void MWritePort::TransitionMethod ( )

Member Data Documentation

◆ bank_bsel

sc_out<sc_uint<4> > MWritePort::bank_bsel

◆ bank_data_in

sc_in<sc_uint<32> > MWritePort::bank_data_in

◆ bank_data_out

sc_out<sc_uint<32> > MWritePort::bank_data_out

◆ bank_rd

sc_out<bool> MWritePort::bank_rd

◆ bank_wr

sc_out<bool> MWritePort::bank_wr

◆ busif_ac_w

sc_in<bool> MWritePort::busif_ac_w

◆ busif_adr

sc_in<sc_uint<32> > MWritePort::busif_adr

◆ busif_busy

sc_in<bool> MWritePort::busif_busy

◆ busif_nolinelock

sc_out<bool> MWritePort::busif_nolinelock

◆ busif_op

sc_out<EBusIfOperation> MWritePort::busif_op

◆ clk

sc_in<bool> MWritePort::clk

◆ data_reg

sc_signal<sc_uint<32> > MWritePort::data_reg
protected

◆ gnt_bank

sc_in<bool> MWritePort::gnt_bank[CFG_MEMU_CACHE_BANKS]

◆ gnt_busif

sc_in<bool> MWritePort::gnt_busif

◆ gnt_linelock

sc_in<bool> MWritePort::gnt_linelock

◆ gnt_tagr

sc_in<bool> MWritePort::gnt_tagr

◆ gnt_tagw

sc_in<bool> MWritePort::gnt_tagw

◆ next_data_reg

sc_signal<sc_uint<32> > MWritePort::next_data_reg
protected

◆ next_state

sc_signal<EWritePortState> MWritePort::next_state
protected

◆ next_tag_reg

sc_signal<SCacheTag> MWritePort::next_tag_reg
protected

◆ port_ac_w

sc_out<bool> MWritePort::port_ac_w

◆ port_ack

sc_out<bool> MWritePort::port_ack

◆ port_adr

sc_in<sc_uint<32> > MWritePort::port_adr

◆ port_bsel

sc_in<sc_uint<4> > MWritePort::port_bsel

◆ port_cache_op

sc_in<sc_uint<3> > MWritePort::port_cache_op

◆ port_data

sc_in<sc_uint<32> > MWritePort::port_data

◆ port_direct

sc_in<bool> MWritePort::port_direct

◆ port_lres_scond

sc_in<bool> MWritePort::port_lres_scond

◆ port_scond_ok

sc_in<bool> MWritePort::port_scond_ok

◆ port_trap_no_u

sc_in<bool> MWritePort::port_trap_no_u

◆ port_trap_u

sc_in<bool> MWritePort::port_trap_u

◆ port_wr

sc_in<bool> MWritePort::port_wr

◆ req_bank

sc_out<bool> MWritePort::req_bank[CFG_MEMU_CACHE_BANKS]

◆ req_busif

sc_out<bool> MWritePort::req_busif

◆ req_linelock

sc_out<bool> MWritePort::req_linelock

◆ req_tagr

sc_out<bool> MWritePort::req_tagr

◆ req_tagw

sc_out<bool> MWritePort::req_tagw

◆ reset

sc_in<bool> MWritePort::reset

◆ state_reg

sc_signal<EWritePortState> MWritePort::state_reg
protected

◆ state_trace

sc_signal<int> MWritePort::state_trace
protected

◆ tag_in

sc_in<SCacheTag> MWritePort::tag_in

◆ tag_out

sc_out<SCacheTag> MWritePort::tag_out

◆ tag_rd

sc_out<bool> MWritePort::tag_rd

◆ tag_reg

sc_signal<SCacheTag> MWritePort::tag_reg
protected

◆ tag_wr

sc_out<bool> MWritePort::tag_wr

The documentation for this class was generated from the following files: