72 template<
int DWIDTH = 1,
int SEL_MAX = 1>
98 template<
int DWIDTH = 1,
int SEL_MAX = 1>
102 sc_in<SSelectorIO<DWIDTH, SEL_MAX> >
f_in;
103 sc_out<SSelectorIO<DWIDTH, SEL_MAX> >
out;
124 template<
int DWIDTH = 1,
int SEL_MAX = 1>
130 sc_out<SSelectorIO<DWIDTH, SEL_MAX> >
out;
138 s_in_reg = next_s_in_reg.read ();
146 f_in_var =
f_in.read ();
147 s_in_var =
s_in.read ();
150 reg = s_in_reg.read ();
153 if (
prio.read () <= FAST_INDEX)
170 next_s_in_reg = s_in_var;
175 MSelector (
const sc_module_name &name, sc_uint<32> FAST_INDEX = 0) : sc_module(name),
177 FAST_INDEX(FAST_INDEX)
180 sensitive <<
clk.pos();
196 const sc_uint<32> FAST_INDEX;
199 sc_signal<SSelectorIO<DWIDTH, SEL_MAX> > s_in_reg;
202 sc_signal<SSelectorIO<DWIDTH, SEL_MAX> > next_s_in_reg;
211 sc_uint<CFG_MEMU_CACHE_WAYS_LD>
way;
235 #define TR_PORTS CFG_NUT_CPU_CORES
284 sensitive <<
clk.pos ();
285 reset_signal_is (
reset,
true);
289 void Trace (sc_trace_file *
tf,
int level = 1);
299 sc_signal<sc_uint<CFG_MEMU_CACHE_WAYS_LD> >
wtag_way;
331 void Trace (sc_trace_file *
tf,
int level = 1);
343 SC_MODULE(MBusController) {
346 sc_out<bool> wb_cyc_o;
347 sc_out<bool> wb_stb_o;
348 sc_out<bool> wb_we_o;
349 sc_out<sc_uint<3> > wb_cti_o;
350 sc_out<sc_uint<2> > wb_bte_o;
352 sc_out<sc_uint<32> > wb_adr_o;
353 sc_out<sc_uint<CFG_MEMU_BUSIF_WIDTH> > wb_dat_o;
358 sc_in<sc_uint<3> > master_cti[
MASTER_NO];
359 sc_in<sc_uint<2> > master_bte[
MASTER_NO];
361 sc_in<sc_uint<32> > master_adr[
MASTER_NO];
362 sc_in<sc_uint<CFG_MEMU_BUSIF_WIDTH> > master_dat[
MASTER_NO];
365 sc_in<bool> switch_master;
369 SC_CTOR (MBusController) {
370 SC_METHOD (MainMethod);
371 for (
unsigned int m = 0; m <
MASTER_NO; m++) {
372 sensitive << master_cyc[m] << master_stb[m] << master_we[m]
373 << master_cti[m] << master_bte[m] << master_sel[m]
374 << master_adr[m] << master_dat[m];
376 sensitive << switch_master;
380 void Trace (sc_trace_file *
tf,
int level = 1);
432 #define bioWriteback 1
433 #define bioInvalidate 2
436 #define bioWritebackAll 5
437 #define bioInvalidateAll 6
438 #define bioFlushAll 7
439 #define bioDirectRead 8
440 #define bioDirectWrite 9
441 #define bioReplace 10
443 #define BUSIF_DATA_REG_NUM (CFG_MEMU_CACHE_BANKS/(CFG_MEMU_BUSIF_WIDTH/32))
444 #define BUSIF_DATA_REG_NUM_LD (CFG_MEMU_CACHE_BANKS_LD-(CFG_MEMU_BUSIF_WIDTH/64))
457 sc_uint<BUSIF_DATA_REG_NUM_LD>
cnt;
558 sensitive <<
clk.pos();
588 void Trace (sc_trace_file *
tf,
int level = 1);
683 sensitive <<
clk.pos ();
699 void Trace (sc_trace_file *
tf,
int level = 1);
808 sensitive <<
clk.pos ();
822 void Trace (sc_trace_file *
tf,
int level = 1);
958 reset_signal_is (
reset,
true);
1044 void Trace (sc_trace_file *
tf,
int level = 1);
1065 sc_signal<sc_uint<CFG_MEMU_RPORTS + CFG_MEMU_WPORTS + 1> >
tagr_reg;
1069 sc_signal<sc_uint<CFG_MEMU_RPORTS + CFG_MEMU_WPORTS> >
busif_reg;
1159 SC_HAS_PROCESS (
MMemu);
1161 : sc_module (name) {
1164 sensitive <<
clk.pos ();
1170 void Trace (sc_trace_file *
tf,
int levels = 1);
Helpers, Makros and performance measuring Classes used in most ParaNut files.
sc_in< bool > req_rp_bank[CFG_MEMU_RPORTS][CFG_MEMU_CACHE_BANKS]
Definition: memu.h:895
sc_signal< sc_uint< CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+1 > > next_tagr_reg
Definition: memu.h:1073
sc_in< bool > req_wp_busif[CFG_MEMU_WPORTS]
Definition: memu.h:900
int GetPrioCpu()
Definition: memu.cpp:2354
sc_signal< SSelectorIO< CFG_MEMU_CACHE_WAYS_LD+CFG_MEMU_CACHE_SETS_LD,(CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+SINGLE_CPU)/CFG_MEMU_BANK_RAM_PORTS > > bank_sel_out[CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
Definition: memu.h:1103
sc_signal< sc_uint< 16 > > counter_reg
Definition: memu.h:1063
sc_in< bool > req_rp_busif[CFG_MEMU_RPORTS]
Definition: memu.h:900
sc_out< bool > gnt_wp_busif[CFG_MEMU_WPORTS]
Definition: memu.h:901
sc_out< bool > gnt_rp_busif[CFG_MEMU_RPORTS]
Definition: memu.h:901
sc_in< sc_uint< 32 > > wiadr_busif
Definition: memu.h:851
sc_module * linelock_sel
Definition: memu.h:1092
sc_in< bool > req_busif_linelock
Definition: memu.h:868
sc_signal< SSelectorIO< 1,(CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+1)> > busif_sel_in[2]
Definition: memu.h:1087
sc_in< bool > clk
Definition: memu.h:849
sc_in< bool > req_wp_linelock[CFG_MEMU_WPORTS]
Definition: memu.h:868
MSelectorPass< CFG_MEMU_CACHE_WAYS_LD+CFG_MEMU_CACHE_SETS_LD,(CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+SINGLE_CPU)/CFG_MEMU_BANK_RAM_PORTS > BankSelectorPass_t
Definition: memu.h:1099
sc_in< bool > req_busif_tagr
Definition: memu.h:884
~MArbiter()
Definition: memu.cpp:1957
sc_in< bool > reset
Definition: memu.h:849
sc_module * bank_sel[CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
Definition: memu.h:1101
sc_out< bool > gnt_wp_tagr_r[CFG_MEMU_WPORTS]
Definition: memu.h:886
static const bool SINGLE_CPU
Definition: memu.h:1098
sc_signal< SSelectorIO< 1,(CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+1)> > busif_sel_out
Definition: memu.h:1086
sc_signal< sc_uint< CFG_MEMU_WPORTS+1 > > req_tagw_reg
Definition: memu.h:1066
sc_out< bool > gnt_busif_linelock
Definition: memu.h:869
sc_out< bool > snoop_stb[CFG_MEMU_WPORTS]
Definition: memu.h:858
sc_out< bool > gnt_busif_tagw
Definition: memu.h:885
MArbiter(sc_module_name name)
Definition: memu.h:912
sc_signal< SSelectorIO< 1, CFG_MEMU_WPORTS > > linelock_sel_in[2]
Definition: memu.h:1095
MSelector< 1, CFG_MEMU_WPORTS > LineLockSelector_t
Definition: memu.h:1091
sc_signal< sc_uint< CFG_MEMU_RPORTS+CFG_MEMU_WPORTS > > busif_reg
Definition: memu.h:1069
void BusIfMethod()
Definition: memu.cpp:2249
void BankMethod()
Definition: memu.cpp:2124
sc_out< bool > gnt_wp_tagr[CFG_MEMU_WPORTS]
Definition: memu.h:885
sc_in< sc_uint< 32 > > adr_wp[CFG_MEMU_WPORTS]
Definition: memu.h:851
sc_signal< sc_uint< CFG_MEMU_RPORTS+CFG_MEMU_WPORTS > > next_busif_reg
Definition: memu.h:1077
MSelector< 1,(CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+1)> BusifSelector_t
Definition: memu.h:1083
MSelectorPass< 1, CFG_MEMU_WPORTS > LineLockSelectorPass_t
Definition: memu.h:1090
sc_out< bool > gnt_wp_linelock[CFG_MEMU_WPORTS]
Definition: memu.h:869
void PrioCPUMethod()
Definition: memu.cpp:1962
sc_module * busif_sel
Definition: memu.h:1084
sc_signal< sc_uint< CFG_MEMU_WPORTS+1 > > tagw_reg
Definition: memu.h:1067
sc_in< bool > req_rp_tagr[CFG_MEMU_RPORTS]
Definition: memu.h:884
sc_signal< sc_uint< CFG_MEMU_WPORTS+1 > > next_req_tagw_reg
Definition: memu.h:1074
sc_in< bool > req_wp_tagw[CFG_MEMU_WPORTS]
Definition: memu.h:884
sc_signal< SSelectorIO< 1, CFG_MEMU_WPORTS > > linelock_sel_out
Definition: memu.h:1094
sc_signal< SSelectorIO< CFG_MEMU_CACHE_WAYS_LD+CFG_MEMU_CACHE_SETS_LD,(CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+SINGLE_CPU)/CFG_MEMU_BANK_RAM_PORTS > > bank_sel_in[CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS][2]
Definition: memu.h:1104
void LineLockMethod()
Definition: memu.cpp:1966
sc_signal< sc_uint< CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+1 > > tagr_reg
Definition: memu.h:1065
sc_out< bool > gnt_wp_tagw_r[CFG_MEMU_WPORTS]
Definition: memu.h:886
sc_signal< sc_uint< CFG_MEMU_WPORTS+1 > > linelock_reg
Definition: memu.h:1064
sc_signal< sc_uint< CFG_MEMU_WPORTS+1 > > next_linelock_reg
Definition: memu.h:1072
sc_in< sc_uint< 32 > > wiadr_rp[CFG_MEMU_RPORTS]
Definition: memu.h:851
sc_out< bool > gnt_rp_bank[CFG_MEMU_RPORTS][CFG_MEMU_CACHE_BANKS]
Definition: memu.h:897
sc_out< bool > gnt_busif_tagr
Definition: memu.h:885
sc_out< bool > gnt_rp_tagr[CFG_MEMU_RPORTS]
Definition: memu.h:885
sc_out< bool > gnt_busif_tagw_r
Definition: memu.h:886
sc_in< bool > tagram_ready
Definition: memu.h:883
MSelector< CFG_MEMU_CACHE_WAYS_LD+CFG_MEMU_CACHE_SETS_LD,(CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+SINGLE_CPU)/CFG_MEMU_BANK_RAM_PORTS > BankSelector_t
Definition: memu.h:1100
sc_in< bool > req_wp_bank[CFG_MEMU_WPORTS][CFG_MEMU_CACHE_BANKS]
Definition: memu.h:894
MSelectorPass< 1,(CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+1)> BusIfSelectorPass_t
Definition: memu.h:1082
sc_out< bool > gnt_wp_tagw[CFG_MEMU_WPORTS]
Definition: memu.h:885
void Trace(sc_trace_file *tf, int level=1)
Definition: memu.cpp:1849
sc_in< bool > req_busif_tagw
Definition: memu.h:884
sc_signal< sc_uint<((CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+(CFG_NUT_CPU_CORES_LD==0))/CFG_MEMU_BANK_RAM_PORTS)+1 > > bank_reg[CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
Definition: memu.h:1068
sc_out< bool > gnt_busif_bank[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:896
sc_out< sc_uint< 32 > > wiadr_bank[CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
Definition: memu.h:854
sc_in< sc_uint< 32 > > way_wp[CFG_MEMU_WPORTS]
Definition: memu.h:852
sc_out< bool > gnt_busif_tagr_r
Definition: memu.h:886
sc_signal< sc_uint<((CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+(CFG_NUT_CPU_CORES_LD==0))/CFG_MEMU_BANK_RAM_PORTS)+1 > > next_bank_reg[CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
Definition: memu.h:1076
sc_out< sc_uint< 32 > > snoop_adr
Definition: memu.h:857
sc_signal< sc_uint< MAX(1, CFG_NUT_CPU_CORES_LD)> > cpu_prio
Definition: memu.h:1079
sc_out< bool > gnt_rp_tagr_r[CFG_MEMU_RPORTS]
Definition: memu.h:886
sc_signal< sc_uint< CFG_MEMU_WPORTS+1 > > next_tagw_reg
Definition: memu.h:1075
sc_in< bool > req_busif_bank[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:894
sc_in< bool > req_wp_tagr[CFG_MEMU_WPORTS]
Definition: memu.h:884
void TagMethod()
Definition: memu.cpp:2029
void TransitionThread()
Definition: memu.cpp:2363
sc_out< bool > gnt_wp_bank[CFG_MEMU_WPORTS][CFG_MEMU_CACHE_BANKS]
Definition: memu.h:896
void SnoopMethod()
Definition: memu.cpp:2330
sc_in< sc_uint< 4 > > wen[CFG_MEMU_BANK_RAM_PORTS]
Definition: memu.h:319
sc_in< sc_uint< 32 > > wdata[CFG_MEMU_BANK_RAM_PORTS]
Definition: memu.h:322
sc_uint< 32 > ram_[CFG_MEMU_CACHE_SETS *CFG_MEMU_CACHE_WAYS]
Definition: memu.h:337
sc_in< sc_uint< 32 > > wiadr[CFG_MEMU_BANK_RAM_PORTS]
Definition: memu.h:321
MBankRam(sc_module_name name)
Definition: memu.h:327
sc_in< bool > wr[CFG_MEMU_BANK_RAM_PORTS]
Definition: memu.h:317
void Trace(sc_trace_file *tf, int level=1)
Definition: memu.cpp:160
sc_in< bool > clk
Definition: memu.h:315
sc_in< bool > rd[CFG_MEMU_BANK_RAM_PORTS]
Definition: memu.h:317
void MainThread()
Definition: memu.cpp:178
sc_out< sc_uint< 32 > > rdata[CFG_MEMU_BANK_RAM_PORTS]
Definition: memu.h:323
sc_in< sc_uint< 32 > > adr_in
Definition: memu.h:530
sc_signal< TWord > state_trace
Definition: memu.h:604
sc_in< sc_uint< 4 > > busif_bsel
Definition: memu.h:522
sc_in< bool > ptw_ac_u
Definition: memu.h:581
sc_in< bool > wb_ack_i
Definition: memu.h:514
sc_in< bool > ptw_ack
Definition: memu.h:576
sc_out< bool > req_bank[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:550
sc_in< bool > gnt_tagw
Definition: memu.h:551
sc_in< bool > trap_u
Definition: memu.h:546
sc_out< bool > bank_wr[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:527
sc_out< bool > req_tagw
Definition: memu.h:550
sc_out< bool > wb_cyc_o
Definition: memu.h:505
sc_out< bool > ac_r_out
Definition: memu.h:541
sc_out< sc_uint< 2 > > wb_bte_o
Definition: memu.h:509
sc_in< bool > clk
Definition: memu.h:502
void MainMethod()
Definition: memu.cpp:578
sc_out< bool > wb_we_o
Definition: memu.h:507
sc_in< bool > gnt_bank[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:551
sc_in< bool > trap_no_u
Definition: memu.h:547
sc_out< bool > ac_w_out
Definition: memu.h:542
sc_in< bool > ptw_ac_a
Definition: memu.h:583
sc_out< bool > req_tagr
Definition: memu.h:550
sc_in< bool > ptw_ac_r
Definition: memu.h:578
sc_out< bool > ac_u_out
Definition: memu.h:544
sc_out< sc_uint< 32 > > ptw_virt_adr
Definition: memu.h:572
sc_out< bool > tag_wr
Definition: memu.h:527
sc_out< bool > ptw_req
Definition: memu.h:575
sc_out< bool > busif_busy
Definition: memu.h:523
sc_out< sc_uint< CFG_MEMU_BUSIF_WIDTH/8 > > wb_sel_o
Definition: memu.h:510
sc_out< bool > wb_stb_o
Definition: memu.h:506
sc_out< sc_uint< 32 > > adr_out
Definition: memu.h:531
sc_in< bool > gnt_tagr
Definition: memu.h:551
sc_out< SCacheTag > tag_out
Definition: memu.h:538
sc_in< bool > paging_mode
Definition: memu.h:585
sc_out< bool > tag_rd_way
Definition: memu.h:527
sc_out< sc_uint< 32 > > wb_adr_o
Definition: memu.h:511
sc_signal< SBusIfRegs > next_regs
Definition: memu.h:601
sc_in< EBusIfOperation > busif_op
Definition: memu.h:520
sc_in< bool > ptw_ac_x
Definition: memu.h:580
sc_out< bool > req_linelock
Definition: memu.h:550
sc_in< bool > ptw_ac_w
Definition: memu.h:579
sc_out< bool > tag_rd
Definition: memu.h:527
void TransitionMethod()
Definition: memu.cpp:605
sc_in< sc_uint< 32 > > data_in[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:534
sc_in< bool > busif_nolinelock
Definition: memu.h:521
sc_out< sc_uint< 3 > > wb_cti_o
Definition: memu.h:508
sc_out< bool > data_out_valid[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:536
sc_signal< SBusIfRegs > regs
Definition: memu.h:598
sc_in< bool > ptw_ac_d
Definition: memu.h:582
sc_in< SCacheTag > tag_in
Definition: memu.h:537
sc_in< bool > reset
Definition: memu.h:502
MBusIf(sc_module_name name)
Definition: memu.h:555
sc_out< sc_uint< CFG_MEMU_BUSIF_WIDTH > > wb_dat_o
Definition: memu.h:512
sc_out< bool > bank_rd[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:527
void Trace(sc_trace_file *tf, int level=1)
Definition: memu.cpp:508
sc_out< sc_uint< 32 > > data_out[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:535
sc_in< bool > gnt_linelock
Definition: memu.h:551
sc_in< sc_uint< 32 > > ptw_phys_adr
Definition: memu.h:573
sc_in< sc_uint< CFG_MEMU_BUSIF_WIDTH > > wb_dat_i
Definition: memu.h:517
sc_out< bool > ac_x_out
Definition: memu.h:543
sc_in< sc_uint< 32 > > wp_adr[CFG_MEMU_WPORTS]
Definition: memu.h:1148
sc_signal< bool > busif_bank_wr[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:1216
sc_signal< bool > gnt_wp_bank[CFG_MEMU_WPORTS][CFG_MEMU_CACHE_BANKS]
Definition: memu.h:1257
sc_signal< bool > busif_tag_rd_way
Definition: memu.h:1215
sc_in< bool > wb_ack_i
Definition: memu.h:1126
sc_signal< bool > rp_tag_rd[CFG_MEMU_RPORTS]
Definition: memu.h:1230
sc_signal< bool > busif_trap_no_u
Definition: memu.h:1223
sc_signal< bool > tlb_ac_u_o
Definition: memu.h:1289
sc_signal< bool > tagram_wr[TR_PORTS]
Definition: memu.h:1189
MArbiter * arbiter
Definition: memu.h:1183
sc_in< bool > rp_direct[CFG_MEMU_RPORTS]
Definition: memu.h:1133
sc_out< bool > rp_ack[CFG_MEMU_RPORTS]
Definition: memu.h:1136
sc_signal< bool > busif_ac_w
Definition: memu.h:1222
sc_out< bool > rp_ac_u[CFG_MEMU_RPORTS]
Definition: memu.h:1139
sc_signal< sc_uint< 32 > > snoop_adr
Definition: memu.h:1265
sc_signal< sc_uint< 20 > > tlb_adr_i
Definition: memu.h:1294
sc_in< sc_uint< 20 > > root_ppn
Definition: memu.h:1155
sc_signal< bool > gnt_rp_tagr[CFG_MEMU_RPORTS]
Definition: memu.h:1251
sc_signal< bool > tlb_ac_r_o
Definition: memu.h:1286
sc_signal< sc_uint< 32 > > wiadr_rp[CFG_MEMU_RPORTS]
Definition: memu.h:1264
sc_signal< SCacheTag > tagram_tag_out[TR_PORTS]
Definition: memu.h:1192
sc_signal< bool > tlb_ac_d_i
Definition: memu.h:1302
sc_signal< sc_uint< 2 > > master_bte[MASTER_NO]
Definition: memu.h:1206
sc_signal< bool > req_busif_bank[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:1255
sc_out< bool > wp_ack[CFG_MEMU_WPORTS]
Definition: memu.h:1144
sc_signal< sc_uint< 32 > > tagram_wadr[TR_PORTS]
Definition: memu.h:1191
sc_signal< SCacheTag > wp_tag_out[CFG_MEMU_WPORTS]
Definition: memu.h:1240
sc_signal< bool > gnt_wp_tagr_r[CFG_MEMU_WPORTS]
Definition: memu.h:1252
sc_signal< bool > busif_data_out_valid[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:1219
sc_in< sc_uint< 4 > > rp_bsel[CFG_MEMU_RPORTS]
Definition: memu.h:1134
MBusController * busController
Definition: memu.h:1179
sc_signal< SCacheTag > rp_tag_in[CFG_MEMU_RPORTS]
Definition: memu.h:1231
sc_signal< bool > master_stb[MASTER_NO]
Definition: memu.h:1203
sc_signal< bool > req_rp_busif[CFG_MEMU_RPORTS]
Definition: memu.h:1260
sc_signal< sc_uint< 32 > > rp_busif_data_reg[CFG_MEMU_BUSIF_WIDTH/32]
Definition: memu.h:1227
sc_signal< sc_uint< CFG_MEMU_BUSIF_WIDTH > > master_dat[MASTER_NO]
Definition: memu.h:1209
sc_in< bool > tlb_flush
Definition: memu.h:1156
sc_out< sc_uint< 32 > > wb_adr_o
Definition: memu.h:1123
sc_signal< bool > req_busif_linelock
Definition: memu.h:1245
sc_signal< sc_uint< 32 > > rp_busif_data[CFG_MEMU_RPORTS]
Definition: memu.h:1228
sc_out< sc_uint< 2 > > wb_bte_o
Definition: memu.h:1121
sc_signal< bool > tlb_req
Definition: memu.h:1282
sc_signal< sc_uint< 32 > > tagram_adr[TR_PORTS]
Definition: memu.h:1190
sc_signal< bool > req_wp_bank[CFG_MEMU_WPORTS][CFG_MEMU_CACHE_BANKS]
Definition: memu.h:1255
sc_in< bool > wp_trap_no_u[CFG_MEMU_WPORTS]
Definition: memu.h:1151
sc_signal< bool > gnt_rp_busif[CFG_MEMU_RPORTS]
Definition: memu.h:1260
sc_signal< bool > bankram_wr[CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
Definition: memu.h:1195
sc_in< bool > wp_paging[CFG_MEMU_WPORTS]
Definition: memu.h:1143
sc_signal< sc_uint< CFG_MEMU_BUSIF_WIDTH/8 > > master_sel[MASTER_NO]
Definition: memu.h:1207
sc_signal< bool > busif_tag_rd
Definition: memu.h:1215
sc_signal< bool > tlb_ac_x_i
Definition: memu.h:1300
sc_in< sc_uint< CFG_MEMU_BUSIF_WIDTH > > wb_dat_i
Definition: memu.h:1129
sc_signal< bool > req_wp_tagr[CFG_MEMU_WPORTS]
Definition: memu.h:1248
sc_signal< bool > tlb_hit
Definition: memu.h:1295
sc_signal< sc_uint< 4 > > busif_bsel
Definition: memu.h:1221
sc_signal< sc_uint< 32 > > ptw_phys_adr
Definition: memu.h:1269
sc_signal< bool > req_busif_tagw
Definition: memu.h:1248
sc_signal< bool > busif_bank_rd[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:1215
void TransitionMethod()
Definition: memu.cpp:2989
sc_signal< SCacheTag > busif_tag_out
Definition: memu.h:1220
sc_in< bool > reset
Definition: memu.h:1114
sc_signal< sc_uint< 32 > > rp_way_out[CFG_MEMU_RPORTS]
Definition: memu.h:1232
sc_signal< bool > gnt_busif_tagw
Definition: memu.h:1250
sc_signal< bool > req_wp_busif[CFG_MEMU_WPORTS]
Definition: memu.h:1261
sc_out< sc_uint< CFG_MEMU_BUSIF_WIDTH/8 > > wb_sel_o
Definition: memu.h:1122
void InitSubmodules()
Definition: memu.cpp:2542
sc_signal< bool > busif_ac_x
Definition: memu.h:1222
sc_signal< bool > ptw_ac_w
Definition: memu.h:1275
sc_in< bool > wp_trap_u[CFG_MEMU_WPORTS]
Definition: memu.h:1151
sc_in< sc_uint< 32 > > rp_adr[CFG_MEMU_RPORTS]
Definition: memu.h:1137
sc_signal< bool > tlb_wr
Definition: memu.h:1282
sc_signal< bool > busif_paging
Definition: memu.h:1224
sc_signal< sc_uint< 32 > > busif_adr_in
Definition: memu.h:1217
sc_in< bool > clk
Definition: memu.h:1114
MTlb * tlb
Definition: memu.h:1182
sc_in< bool > wp_wr[CFG_MEMU_WPORTS]
Definition: memu.h:1141
sc_signal< bool > tlb_ac_w_i
Definition: memu.h:1299
sc_signal< bool > gnt_wp_linelock[CFG_MEMU_WPORTS]
Definition: memu.h:1246
sc_signal< bool > ptw_ac_r
Definition: memu.h:1274
void Trace(sc_trace_file *tf, int levels=1)
Definition: memu.cpp:2393
sc_signal< sc_uint< 32 > > rp_bank_sel[CFG_MEMU_RPORTS]
Definition: memu.h:1234
sc_signal< bool > req_wp_tagw[CFG_MEMU_WPORTS]
Definition: memu.h:1248
sc_out< bool > wp_ac_w[CFG_MEMU_WPORTS]
Definition: memu.h:1150
sc_in< bool > rp_paging[CFG_MEMU_RPORTS]
Definition: memu.h:1135
sc_signal< bool > gnt_busif_tagr_r
Definition: memu.h:1252
sc_signal< bool > busif_busy
Definition: memu.h:1214
sc_signal< bool > ptw_ac_x
Definition: memu.h:1276
MMemu(sc_module_name name)
Definition: memu.h:1160
sc_signal< bool > switch_master
Definition: memu.h:1210
sc_signal< bool > wp_bank_wr[CFG_MEMU_WPORTS]
Definition: memu.h:1239
sc_signal< sc_uint< 32 > > busif_adr_out
Definition: memu.h:1217
sc_signal< bool > gnt_wp_tagw_r[CFG_MEMU_WPORTS]
Definition: memu.h:1252
sc_signal< EBusIfOperation > rp_busif_op[CFG_MEMU_RPORTS]
Definition: memu.h:1229
sc_signal< bool > master_we[MASTER_NO]
Definition: memu.h:1204
sc_signal< bool > wp_busif_nolinelock[CFG_MEMU_WPORTS]
Definition: memu.h:1238
sc_signal< EBusIfOperation > busif_op
Definition: memu.h:1213
sc_in< sc_uint< 3 > > wp_cache_op[CFG_MEMU_WPORTS]
Definition: memu.h:1147
sc_signal< bool > req_busif_tagr
Definition: memu.h:1248
sc_signal< bool > ptw_req
Definition: memu.h:1271
sc_signal< bool > tlb_superpage_i
Definition: memu.h:1293
MPtw * ptw
Definition: memu.h:1181
sc_out< sc_uint< 32 > > rp_data[CFG_MEMU_RPORTS]
Definition: memu.h:1138
sc_signal< bool > gnt_busif_tagw_r
Definition: memu.h:1252
sc_out< sc_uint< CFG_MEMU_BUSIF_WIDTH > > wb_dat_o
Definition: memu.h:1124
sc_signal< bool > ptw_ack
Definition: memu.h:1272
sc_signal< bool > gnt_wp_busif[CFG_MEMU_WPORTS]
Definition: memu.h:1261
sc_out< bool > wb_stb_o
Definition: memu.h:1118
sc_signal< bool > tagram_rd[TR_PORTS]
Definition: memu.h:1189
sc_signal< bool > busif_tag_wr
Definition: memu.h:1215
sc_signal< bool > tlb_ac_r_i
Definition: memu.h:1298
sc_in< bool > wp_direct[CFG_MEMU_WPORTS]
Definition: memu.h:1141
sc_signal< bool > ptw_ac_u
Definition: memu.h:1277
sc_signal< bool > tlb_ac_a_i
Definition: memu.h:1303
void InterconnectMethod()
Definition: memu.cpp:2995
sc_signal< bool > tagram_ready
Definition: memu.h:1189
sc_signal< bool > tlb_ac_w_o
Definition: memu.h:1287
sc_signal< bool > wp_tag_wr[CFG_MEMU_WPORTS]
Definition: memu.h:1239
sc_signal< bool > tlb_miss
Definition: memu.h:1296
sc_signal< sc_uint< 32 > > adr_wp[CFG_MEMU_WPORTS]
Definition: memu.h:1264
sc_signal< bool > ptw_ac_a
Definition: memu.h:1279
sc_signal< bool > req_rp_bank[CFG_MEMU_RPORTS][CFG_MEMU_CACHE_BANKS]
Definition: memu.h:1256
sc_signal< bool > gnt_rp_bank[CFG_MEMU_RPORTS][CFG_MEMU_CACHE_BANKS]
Definition: memu.h:1258
sc_signal< bool > busif_trap_u
Definition: memu.h:1223
sc_signal< bool > req_wp_linelock[CFG_MEMU_WPORTS]
Definition: memu.h:1245
sc_signal< bool > tlb_ac_u_i
Definition: memu.h:1301
sc_signal< bool > bankram_rd[CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
Definition: memu.h:1195
sc_signal< bool > busif_ac_r
Definition: memu.h:1222
sc_out< sc_uint< 3 > > wb_cti_o
Definition: memu.h:1120
sc_signal< sc_uint< 32 > > ptw_virt_adr
Definition: memu.h:1270
sc_signal< sc_uint< 32 > > busif_data_out[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:1218
~MMemu()
Definition: memu.h:1167
sc_signal< sc_uint< 32 > > bankram_rdata[CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
Definition: memu.h:1199
sc_signal< sc_uint< 32 > > rp_bank_data_in[CFG_MEMU_RPORTS]
Definition: memu.h:1233
sc_out< bool > wb_cyc_o
Definition: memu.h:1117
sc_signal< bool > master_cyc[MASTER_NO]
Definition: memu.h:1202
sc_signal< bool > gnt_rp_tagr_r[CFG_MEMU_RPORTS]
Definition: memu.h:1253
sc_signal< sc_uint< 32 > > wiadr_busif
Definition: memu.h:1264
sc_signal< bool > wp_bank_rd[CFG_MEMU_WPORTS]
Definition: memu.h:1239
void InitInterconnectMethod()
Definition: memu.cpp:2942
sc_signal< bool > gnt_busif_linelock
Definition: memu.h:1246
sc_signal< sc_uint< 3 > > master_cti[MASTER_NO]
Definition: memu.h:1205
sc_signal< sc_uint< 4 > > bankram_wen[CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
Definition: memu.h:1196
sc_signal< bool > busif_ac_u
Definition: memu.h:1222
sc_signal< bool > gnt_busif_bank[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:1257
MBusIf * busIf
Definition: memu.h:1180
sc_signal< sc_uint< 20 > > tlb_va_o
Definition: memu.h:1283
sc_in< sc_uint< 4 > > wp_bsel[CFG_MEMU_WPORTS]
Definition: memu.h:1142
sc_signal< sc_uint< 32 > > wp_bank_data_in[CFG_MEMU_WPORTS]
Definition: memu.h:1241
sc_signal< sc_uint< 32 > > busif_data_in[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:1217
MBankRam * bankRam[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:1178
sc_in< bool > wp_lres_scond[CFG_MEMU_WPORTS]
Definition: memu.h:1145
sc_out< bool > rp_ac_r[CFG_MEMU_RPORTS]
Definition: memu.h:1139
MReadPort * readPorts[CFG_MEMU_RPORTS]
Definition: memu.h:1184
sc_signal< bool > gnt_wp_tagr[CFG_MEMU_WPORTS]
Definition: memu.h:1250
sc_signal< sc_uint< 32 > > way_wp[CFG_MEMU_WPORTS]
Definition: memu.h:1264
sc_out< bool > wp_scond_ok[CFG_MEMU_WPORTS]
Definition: memu.h:1146
sc_out< bool > wb_we_o
Definition: memu.h:1119
sc_signal< sc_uint< 32 > > bankram_wiadr[CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
Definition: memu.h:1197
sc_out< bool > rp_ac_x[CFG_MEMU_RPORTS]
Definition: memu.h:1139
sc_signal< bool > ptw_ac_d
Definition: memu.h:1278
sc_signal< bool > tlb_superpage_o
Definition: memu.h:1285
sc_signal< sc_uint< 4 > > wp_bank_bsel[CFG_MEMU_WPORTS]
Definition: memu.h:1242
sc_signal< bool > tlb_ac_x_o
Definition: memu.h:1288
MWritePort * writePorts[CFG_MEMU_WPORTS]
Definition: memu.h:1185
sc_signal< bool > gnt_busif_tagr
Definition: memu.h:1250
sc_signal< sc_uint< 20 > > tlb_pa_o
Definition: memu.h:1284
void FreeSubmodules()
Definition: memu.cpp:2927
sc_signal< sc_uint< 32 > > bankram_wdata[CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
Definition: memu.h:1198
MTagRam * tagRam
Definition: memu.h:1177
sc_signal< bool > snoop_stb[CFG_MEMU_WPORTS]
Definition: memu.h:1266
sc_signal< SCacheTag > busif_tag_in
Definition: memu.h:1220
sc_signal< bool > req_rp_tagr[CFG_MEMU_RPORTS]
Definition: memu.h:1249
sc_signal< bool > tlb_ac_d_o
Definition: memu.h:1290
sc_signal< bool > tlb_ac_a_o
Definition: memu.h:1291
sc_signal< SCacheTag > wp_tag_in[CFG_MEMU_WPORTS]
Definition: memu.h:1240
sc_signal< EBusIfOperation > wp_busif_op[CFG_MEMU_WPORTS]
Definition: memu.h:1237
sc_signal< bool > wp_tag_rd[CFG_MEMU_WPORTS]
Definition: memu.h:1239
sc_signal< sc_uint< 32 > > wp_bank_data_out[CFG_MEMU_WPORTS]
Definition: memu.h:1241
sc_signal< bool > gnt_wp_tagw[CFG_MEMU_WPORTS]
Definition: memu.h:1250
sc_in< bool > rp_rd[CFG_MEMU_RPORTS]
Definition: memu.h:1133
sc_signal< SCacheTag > tagram_tag_in[TR_PORTS]
Definition: memu.h:1192
sc_signal< bool > rp_bank_rd[CFG_MEMU_RPORTS]
Definition: memu.h:1230
sc_signal< bool > busif_nolinelock
Definition: memu.h:1214
sc_in< sc_uint< 32 > > wp_data[CFG_MEMU_WPORTS]
Definition: memu.h:1149
sc_signal< sc_uint< 32 > > master_adr[MASTER_NO]
Definition: memu.h:1208
sc_out< bool > tag_rd
Definition: memu.h:660
sc_out< EBusIfOperation > busif_op
Definition: memu.h:652
sc_out< bool > port_ac_u
Definition: memu.h:643
sc_signal< EReadportState > state_reg
Definition: memu.h:708
sc_in< sc_uint< 32 > > snoop_adr
Definition: memu.h:671
sc_in< bool > port_direct
Definition: memu.h:637
sc_signal< bool > next_ac_r_reg
Definition: memu.h:726
sc_signal< sc_uint< 32 > > bank_sel_reg
Definition: memu.h:711
sc_out< bool > req_bank[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:667
sc_signal< bool > next_ac_u_reg
Definition: memu.h:728
sc_signal< bool > ac_u_reg
Definition: memu.h:717
sc_in< bool > port_lres_scond
Definition: memu.h:645
sc_in< bool > gnt_tagr
Definition: memu.h:668
sc_signal< bool > next_ac_x_reg
Definition: memu.h:727
sc_out< sc_uint< 32 > > bank_sel
Definition: memu.h:662
sc_in< bool > busif_ac_x
Definition: memu.h:655
void Trace(sc_trace_file *tf, int level=1)
Definition: memu.cpp:1157
sc_signal< EReadportState > next_state
Definition: memu.h:722
sc_out< bool > req_busif
Definition: memu.h:667
sc_out< bool > req_tagr
Definition: memu.h:667
sc_in< bool > snoop_stb
Definition: memu.h:672
sc_in< sc_uint< 32 > > bank_data_in
Definition: memu.h:661
sc_out< sc_uint< 32 > > way_out
Definition: memu.h:664
sc_signal< bool > link_valid_reg
Definition: memu.h:714
sc_signal< bool > busif_hit
Definition: memu.h:721
void TransitionMethod()
Definition: memu.cpp:1227
sc_in< sc_uint< 32 > > busif_data
Definition: memu.h:650
sc_signal< bool > ac_r_reg
Definition: memu.h:715
sc_in< sc_uint< 32 > > busif_adr
Definition: memu.h:649
void HitMethod()
Definition: memu.cpp:1214
sc_in< bool > clk
Definition: memu.h:627
sc_out< sc_uint< 32 > > port_data
Definition: memu.h:640
sc_signal< bool > ac_x_reg
Definition: memu.h:716
sc_in< sc_uint< 32 > > port_adr
Definition: memu.h:639
sc_signal< bool > next_link_valid_reg
Definition: memu.h:725
sc_in< bool > reset
Definition: memu.h:627
sc_in< bool > busif_ac_u
Definition: memu.h:656
sc_in< bool > gnt_bank[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:668
sc_in< bool > busif_ac_r
Definition: memu.h:654
void MainMethod()
Definition: memu.cpp:1243
sc_out< bool > bank_rd
Definition: memu.h:660
sc_signal< sc_uint< 32 > > link_adr_reg
Definition: memu.h:713
sc_in< bool > busif_data_valid[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:651
sc_in< SCacheTag > tag_in
Definition: memu.h:663
sc_signal< sc_uint< 32 > > next_bank_sel
Definition: memu.h:723
sc_signal< sc_uint< 32 > > next_link_adr_reg
Definition: memu.h:724
sc_out< bool > port_scond_ok
Definition: memu.h:646
MReadPort(sc_module_name name)
Definition: memu.h:676
sc_out< bool > port_ac_x
Definition: memu.h:642
sc_in< bool > gnt_busif
Definition: memu.h:668
sc_signal< int > state_trace
Definition: memu.h:709
sc_out< bool > port_ac_r
Definition: memu.h:641
sc_in< bool > busif_busy
Definition: memu.h:653
sc_out< bool > port_ack
Definition: memu.h:638
sc_in< bool > port_rd
Definition: memu.h:637
sc_in< bool > reset
Definition: memu.h:266
sc_signal< bool > write_tag
Definition: memu.h:298
sc_signal< sc_uint< 6 > > use_iadr_reg[TR_PORTS+1]
Definition: memu.h:303
void Trace(sc_trace_file *tf, int level=1)
Definition: memu.cpp:241
sc_in< bool > wr[TR_PORTS]
Definition: memu.h:270
sc_in< SCacheTag > tag_in[TR_PORTS]
Definition: memu.h:275
sc_signal< sc_uint< CFG_MEMU_CACHE_WAYS_LD > > wtag_way
Definition: memu.h:299
sc_in< sc_uint< 32 > > adr[TR_PORTS]
Definition: memu.h:273
sc_signal< sc_uint< 8 > > counter
Definition: memu.h:306
void MainThread()
Definition: memu.cpp:304
sc_signal< sc_uint< 32 > > wtag_port
Definition: memu.h:301
sc_out< bool > ready
Definition: memu.h:267
sc_signal< sc_uint< 32 > > wtag_iadr
Definition: memu.h:300
sc_in< bool > rd_way
Definition: memu.h:271
STagEntry ram_[CFG_MEMU_CACHE_SETS]
Definition: memu.h:295
sc_in< bool > clk
Definition: memu.h:266
sc_in< bool > rd[TR_PORTS]
Definition: memu.h:269
sc_signal< sc_uint< 6 > > use_reg[TR_PORTS+1]
Definition: memu.h:303
sc_in< sc_uint< 32 > > wadr[TR_PORTS]
Definition: memu.h:274
MTagRam(sc_module_name name)
Definition: memu.h:281
sc_signal< bool > use_wr_reg[TR_PORTS+1]
Definition: memu.h:304
sc_out< SCacheTag > tag_out[TR_PORTS]
Definition: memu.h:277
sc_in< sc_uint< 32 > > bank_data_in
Definition: memu.h:793
sc_in< bool > busif_ac_w
Definition: memu.h:788
sc_out< bool > busif_nolinelock
Definition: memu.h:786
sc_signal< sc_uint< 32 > > next_data_reg
Definition: memu.h:839
sc_in< bool > gnt_busif
Definition: memu.h:801
sc_in< bool > port_scond_ok
Definition: memu.h:780
sc_out< bool > tag_wr
Definition: memu.h:792
void Trace(sc_trace_file *tf, int level=1)
Definition: memu.cpp:1458
sc_in< bool > port_wr
Definition: memu.h:767
sc_signal< EWritePortState > next_state
Definition: memu.h:837
void TransitionMethod()
Definition: memu.cpp:1523
sc_in< bool > reset
Definition: memu.h:758
sc_out< bool > bank_rd
Definition: memu.h:792
sc_out< bool > bank_wr
Definition: memu.h:792
sc_in< bool > port_trap_u
Definition: memu.h:771
sc_out< bool > tag_rd
Definition: memu.h:792
sc_in< bool > port_lres_scond
Definition: memu.h:779
sc_out< bool > req_bank[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:800
sc_in< bool > port_trap_no_u
Definition: memu.h:772
sc_signal< EWritePortState > state_reg
Definition: memu.h:830
sc_in< sc_uint< 3 > > port_cache_op
Definition: memu.h:774
sc_in< bool > gnt_bank[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:801
sc_in< bool > gnt_linelock
Definition: memu.h:801
sc_out< bool > req_tagr
Definition: memu.h:800
void MainMethod()
Definition: memu.cpp:1557
sc_out< SCacheTag > tag_out
Definition: memu.h:797
sc_out< sc_uint< 32 > > bank_data_out
Definition: memu.h:794
sc_signal< sc_uint< 32 > > data_reg
Definition: memu.h:834
sc_out< bool > req_linelock
Definition: memu.h:800
sc_in< sc_uint< 32 > > port_adr
Definition: memu.h:776
sc_in< sc_uint< 4 > > port_bsel
Definition: memu.h:768
sc_out< bool > req_tagw
Definition: memu.h:800
sc_out< bool > port_ac_w
Definition: memu.h:770
sc_in< bool > busif_busy
Definition: memu.h:787
sc_out< EBusIfOperation > busif_op
Definition: memu.h:785
sc_in< bool > gnt_tagw
Definition: memu.h:801
sc_in< sc_uint< 32 > > port_data
Definition: memu.h:777
sc_in< SCacheTag > tag_in
Definition: memu.h:796
sc_signal< SCacheTag > tag_reg
Definition: memu.h:833
sc_signal< int > state_trace
Definition: memu.h:831
sc_out< sc_uint< 4 > > bank_bsel
Definition: memu.h:795
sc_in< bool > gnt_tagr
Definition: memu.h:801
sc_in< sc_uint< 32 > > busif_adr
Definition: memu.h:784
sc_out< bool > port_ack
Definition: memu.h:769
sc_in< bool > port_direct
Definition: memu.h:767
sc_out< bool > req_busif
Definition: memu.h:800
sc_in< bool > clk
Definition: memu.h:758
sc_signal< SCacheTag > next_tag_reg
Definition: memu.h:838
MWritePort(sc_module_name name)
Definition: memu.h:805
#define CFG_NUT_CPU_CORES
Number of cores overall (derived).
Definition: paranut-config.h:98
#define CFG_NUT_CPU_CORES_LD
Number of cores overall as log2.
Definition: paranut-config.h:96
#define CFG_MEMU_RPORTS
Number of read ports (RPORTS) in the MemU (derived).
Definition: paranut-config.h:236
#define CFG_MEMU_CACHE_WAYS
Number of cache ways (derived).
Definition: paranut-config.h:203
#define CFG_MEMU_BANK_RAM_PORTS
Number of ports per bank.
Definition: paranut-config.h:210
#define CFG_MEMU_WPORTS
Number of write ports (WPORTS) in the MemU (derived).
Definition: paranut-config.h:234
#define CFG_MEMU_CACHE_WAYS_LD
Number of cache ways as log2.
Definition: paranut-config.h:201
#define CFG_MEMU_CACHE_BANKS
Number of cache banks (derived).
Definition: paranut-config.h:186
#define CFG_MEMU_BUSIF_WIDTH
Busif Data Width.
Definition: paranut-config.h:228
#define CFG_MEMU_CACHE_SETS_LD
Number of cache sets as log2.
Definition: paranut-config.h:191
#define CFG_MEMU_CACHE_BANKS_LD
Number of cache banks as log2.
Definition: paranut-config.h:184
#define CFG_MEMU_CACHE_SETS
Number of cache sets (derived).
Definition: paranut-config.h:193
#define PN_TRACE(TF, OBJ)
Add sc_object OBJ to the trace file TF.
Definition: base.h:207
#define PN_TRACE_R(TF, OBJ, MEMBER, STR)
Helper macro for recursively calling sc_trace in own types/structs.
Definition: base.h:255
#define NUM_BITS(A)
Number of bits necessary to encode A.
Definition: base.h:156
#define MAX(A, B)
Maximum of A and B.
Definition: base.h:154
EWritePortState
Definition: memu.h:734
@ s_wp_recheck
Definition: memu.h:744
@ s_wp_replace_wait_busif
Definition: memu.h:747
@ s_wp_special_request_busif_only
Definition: memu.h:748
@ s_wp_recheck_read_tag
Definition: memu.h:745
@ s_wp_write_bank
Definition: memu.h:741
@ s_wp_request_linelock_only
Definition: memu.h:737
@ s_wp_miss
Definition: memu.h:742
@ s_wp_special
Definition: memu.h:749
@ s_wp_write_tag1
Definition: memu.h:740
@ s_wp_read_tag
Definition: memu.h:738
@ s_wp_request_busif_only
Definition: memu.h:743
@ s_wp_write_tag1_and_bank
Definition: memu.h:739
@ s_wp_direct
Definition: memu.h:736
@ s_wp_replace
Definition: memu.h:746
@ s_wp_page_fault
Definition: memu.h:751
@ s_wp_special_wait_complete
Definition: memu.h:750
@ s_wp_init
Definition: memu.h:735
EReadportState
Definition: memu.h:611
@ s_rp_request_tag_only
Definition: memu.h:614
@ s_rp_read_tag
Definition: memu.h:615
@ s_rp_init
Definition: memu.h:612
@ s_rp_miss_wait_busif
Definition: memu.h:617
@ s_rp_miss_replace
Definition: memu.h:620
@ s_rp_miss_read_tag
Definition: memu.h:619
@ s_rp_direct_wait_busif
Definition: memu.h:613
@ s_rp_read_bank
Definition: memu.h:616
@ s_rp_miss_request_tag
Definition: memu.h:618
EBusIfMmuState
Definition: memu.h:409
@ BifMmuAwaitResponse
Definition: memu.h:412
@ BifMmuReq
Definition: memu.h:411
@ BifMmuPteSuccess
Definition: memu.h:414
@ BifMmuIdle
Definition: memu.h:410
@ BifMmuDone
Definition: memu.h:415
@ BifMmuLoadPageEntry
Definition: memu.h:413
sc_uint< 4 > EBusIfOperation
Definition: memu.h:430
#define BUSIF_DATA_REG_NUM
Definition: memu.h:443
EBusIfState
Definition: memu.h:390
@ BifCacheRequestLLWait
Definition: memu.h:395
@ BifCacheAll
Definition: memu.h:405
@ BifDirectWrite
Definition: memu.h:394
@ BifCacheRequestRTWait
Definition: memu.h:396
@ BifDirectRead1
Definition: memu.h:392
@ BifCacheFillIdataPageFault
Definition: memu.h:406
@ BifCacheReadTag
Definition: memu.h:397
@ BifIdle
Definition: memu.h:391
@ BifCacheWriteBackVictim
Definition: memu.h:403
@ BifDirectRead2
Definition: memu.h:393
@ BifCacheReadDirtyBanks
Definition: memu.h:399
@ BifCacheReplaceInvalidateTag
Definition: memu.h:400
@ BifCacheReplaceReadIdata
Definition: memu.h:398
@ BifCacheReplaceWriteBanks
Definition: memu.h:401
@ BifCacheAck
Definition: memu.h:404
@ BifCacheWriteTag
Definition: memu.h:402
#define TR_PORTS
Definition: memu.h:235
#define MASTER_NO
Definition: memu.h:61
Configuration Makros used in most ParaNut files.
MSelector(const sc_module_name &name, sc_uint< 32 > FAST_INDEX=0)
Definition: memu.h:175
sc_in< sc_uint< MAX(1, CFG_NUT_CPU_CORES_LD)> > prio
Definition: memu.h:131
sc_in< bool > reset
Definition: memu.h:128
sc_out< SSelectorIO< DWIDTH, SEL_MAX > > out
Definition: memu.h:130
sc_in< bool > clk
Definition: memu.h:128
void Trace(sc_trace_file *tf, int level)
Definition: memu.h:186
sc_in< SSelectorIO< DWIDTH, SEL_MAX > > f_in
Definition: memu.h:129
sc_in< SSelectorIO< DWIDTH, SEL_MAX > > s_in
Definition: memu.h:129
void TransitionMethod()
Definition: memu.h:133
void CombMethod()
Definition: memu.h:141
void Trace(sc_trace_file *tf, int level)
Definition: memu.h:118
sc_out< SSelectorIO< DWIDTH, SEL_MAX > > out
Definition: memu.h:103
sc_in< SSelectorIO< DWIDTH, SEL_MAX > > f_in
Definition: memu.h:102
void CombMethod()
Definition: memu.h:105
MSelectorPass(const sc_module_name &name)
Definition: memu.h:110
bool ac_w
Definition: memu.h:485
friend void sc_trace(sc_trace_file *tf, const SBusIfMmuRegs &t, const std::string &name)
Definition: memu.cpp:112
bool ac_r
Definition: memu.h:484
bool operator==(const SBusIfMmuRegs &t)
bool ack
Definition: memu.h:483
friend ostream & operator<<(ostream &o, const SBusIfMmuRegs &t)
sc_uint< 32 > adr
Definition: memu.h:482
bool ac_u
Definition: memu.h:487
EBusIfMmuState state
Definition: memu.h:481
bool ac_x
Definition: memu.h:486
bool ac_d
Definition: memu.h:488
bool ac_a
Definition: memu.h:489
SCacheTag tag
Definition: memu.h:460
EBusIfState state
Definition: memu.h:447
bool operator==(const SBusIfRegs &t)
Definition: memu.cpp:68
sc_uint< CFG_MEMU_BUSIF_WIDTH > idata[BUSIF_DATA_REG_NUM]
Definition: memu.h:455
sc_uint< 32 > phys_adr
Definition: memu.h:451
sc_uint< CFG_MEMU_CACHE_BANKS_LD > adr_ofs
Definition: memu.h:453
sc_uint< 32 > odata[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:456
bool ac_x
Definition: memu.h:465
sc_uint< CFG_MEMU_CACHE_BANKS > last_banks_left
Definition: memu.h:459
EBusIfOperation op
Definition: memu.h:448
sc_uint< 32 > virt_adr
Definition: memu.h:452
bool transl_done
Definition: memu.h:467
bool linelock
Definition: memu.h:449
bool paging_en
Definition: memu.h:468
sc_uint< BUSIF_DATA_REG_NUM_LD > cnt
Definition: memu.h:457
friend void sc_trace(sc_trace_file *tf, const SBusIfRegs &t, const std::string &name)
Definition: memu.cpp:82
bool idata_valid[CFG_MEMU_CACHE_BANKS]
Definition: memu.h:454
sc_uint< CFG_MEMU_CACHE_BANKS > banks_left
Definition: memu.h:458
sc_uint< 4 > bsel
Definition: memu.h:450
friend ostream & operator<<(ostream &o, const SBusIfRegs &t)
bool ac_w
Definition: memu.h:464
bool ac_u
Definition: memu.h:466
bool ac_r
Definition: memu.h:463
bool ac_x
Definition: memu.h:209
bool ac_r
Definition: memu.h:209
friend ostream & operator<<(ostream &os, const SCacheTag &t)
Definition: memu.cpp:46
sc_uint< 32-CFG_MEMU_CACHE_SETS_LD-CFG_MEMU_CACHE_BANKS_LD-2 > tadr
Definition: memu.h:210
friend void sc_trace(sc_trace_file *tf, const SCacheTag &t, const std::string &name)
Definition: memu.cpp:53
bool valid
Definition: memu.h:208
bool ac_w
Definition: memu.h:209
bool ac_u
Definition: memu.h:209
sc_uint< CFG_MEMU_CACHE_WAYS_LD > way
Definition: memu.h:211
bool operator==(const SCacheTag &t) const
Definition: memu.cpp:41
bool dirty
Definition: memu.h:208
friend ostream & operator<<(ostream &o, const SSelectorIO &t)
Definition: memu.h:86
bool sel_valid
Definition: memu.h:76
sc_uint< DWIDTH > dat
Definition: memu.h:74
bool operator==(const SSelectorIO &t)
Definition: memu.h:82
SSelectorIO(sc_uint< DWIDTH > _dat=0, sc_uint< NUM_BITS(SEL_MAX)> _sel=0, bool _sel_valid=0)
Definition: memu.h:78
friend void sc_trace(sc_trace_file *tf, const SSelectorIO &t, const std::string &name)
Definition: memu.h:91
sc_uint< NUM_BITS(SEL_MAX)> sel
Definition: memu.h:75
STag tag[CFG_MEMU_CACHE_WAYS]
Definition: memu.h:248
sc_uint< 6 > use
Definition: memu.h:249
bool ac_x
Definition: memu.h:241
bool ac_w
Definition: memu.h:241
bool valid
Definition: memu.h:240
bool dirty
Definition: memu.h:240
bool ac_u
Definition: memu.h:241
sc_uint< 32-CFG_MEMU_CACHE_SETS_LD-CFG_MEMU_CACHE_BANKS_LD-2 > tadr
Definition: memu.h:242
bool ac_r
Definition: memu.h:241
sc_trace_file * tf
Definition: tlb_tb.cpp:94