ParaNut SystemC Model
A SystemC Model of the ParaNut architecture
Macros | Functions | Variables
dm_tb.cpp File Reference
#include "dm.h"
#include <stdio.h>
#include <signal.h>
#include <systemc.h>
Include dependency graph for dm_tb.cpp:

Macros

#define CLK_PERIOD   10.0
 

Functions

void RunCycles (int n=1)
 
void InitDMIRead (uint32_t adr)
 
uint32_t GetDMIData ()
 
uint32_t CompleteDMIRead (uint32_t adr)
 
void InitDMIWrite (uint32_t adr, uint32_t val)
 
void CompleteDMIWrite (uint32_t adr, uint32_t val)
 
void InitWBWrite (uint32_t adr, uint32_t val)
 
void CompleteWBWrite (uint32_t adr, uint32_t val)
 
int sc_main (int argc, char *argv[])
 

Variables

sc_signal< bool > dmi_rd
 
sc_signal< bool > dmi_wr
 
sc_signal< sc_uint< DTM_ADDR_WIDTH > > dmi_adr
 
sc_signal< sc_uint< 32 > > dmi_dat_o
 
sc_signal< sc_uint< 32 > > dmi_dat_i
 
sc_signal< sc_uint< CFG_NUT_CPU_CORES > > dbg_request
 
sc_signal< bool > dbg_reset
 
sc_signal< bool > clk
 
sc_signal< bool > reset
 
sc_signal< bool > wb_stb
 
sc_signal< bool > wb_cyc
 
sc_signal< bool > wb_we
 
sc_signal< bool > wb_ack
 
sc_signal< bool > wb_err
 
sc_signal< bool > wb_rty
 
sc_signal< sc_uint< CFG_MEMU_BUSIF_WIDTH/8 > > wb_sel
 
sc_signal< sc_uint< 32 > > wb_adr
 
sc_signal< sc_uint< CFG_MEMU_BUSIF_WIDTH > > wb_dat_w
 
sc_signal< sc_uint< CFG_MEMU_BUSIF_WIDTH > > wb_dat_r
 

Macro Definition Documentation

◆ CLK_PERIOD

#define CLK_PERIOD   10.0

Function Documentation

◆ CompleteDMIRead()

uint32_t CompleteDMIRead ( uint32_t  adr)

◆ CompleteDMIWrite()

void CompleteDMIWrite ( uint32_t  adr,
uint32_t  val 
)

◆ CompleteWBWrite()

void CompleteWBWrite ( uint32_t  adr,
uint32_t  val 
)

◆ GetDMIData()

uint32_t GetDMIData ( )

◆ InitDMIRead()

void InitDMIRead ( uint32_t  adr)

◆ InitDMIWrite()

void InitDMIWrite ( uint32_t  adr,
uint32_t  val 
)

◆ InitWBWrite()

void InitWBWrite ( uint32_t  adr,
uint32_t  val 
)

◆ RunCycles()

void RunCycles ( int  n = 1)

◆ sc_main()

int sc_main ( int  argc,
char *  argv[] 
)

Variable Documentation

◆ clk

sc_signal<bool> clk

◆ dbg_request

sc_signal<sc_uint<CFG_NUT_CPU_CORES> > dbg_request

◆ dbg_reset

sc_signal<bool> dbg_reset

◆ dmi_adr

sc_signal<sc_uint<DTM_ADDR_WIDTH> > dmi_adr

◆ dmi_dat_i

sc_signal<sc_uint<32> > dmi_dat_i

◆ dmi_dat_o

sc_signal<sc_uint<32> > dmi_dat_o

◆ dmi_rd

sc_signal<bool> dmi_rd

◆ dmi_wr

sc_signal<bool> dmi_wr

◆ reset

sc_signal<bool> reset

◆ wb_ack

sc_signal<bool> wb_ack

◆ wb_adr

sc_signal<sc_uint<32> > wb_adr

◆ wb_cyc

sc_signal<bool> wb_cyc

◆ wb_dat_r

sc_signal<sc_uint<CFG_MEMU_BUSIF_WIDTH> > wb_dat_r

◆ wb_dat_w

sc_signal<sc_uint<CFG_MEMU_BUSIF_WIDTH> > wb_dat_w

◆ wb_err

sc_signal<bool> wb_err

◆ wb_rty

sc_signal<bool> wb_rty

◆ wb_sel

sc_signal<sc_uint<CFG_MEMU_BUSIF_WIDTH/8> > wb_sel

◆ wb_stb

sc_signal<bool> wb_stb

◆ wb_we

sc_signal<bool> wb_we