libparanut
A Hardware Abstraction Layer for ParaNut Architectures.

Modes of the ParaNut Cores. More...

Collaboration diagram for Modes:
#define PN_M0   0x0U
 Mode 0 (halted Mode).
 
#define PN_M1   0x1U
 Mode 1 (linked Mode).
 
#define PN_M2   0x2U
 Mode 2 (unlinked or threaded Mode).
 
#define PN_M3   0x3U
 Mode 3 (autonomous Mode).
 
#define PN_M0   0x0U
 Mode 0 (halted Mode).
 
#define PN_M1   0x1U
 Mode 1 (linked Mode).
 
#define PN_M2   0x2U
 Mode 2 (unlinked or threaded Mode).
 
#define PN_M3   0x3U
 Mode 3 (autonomous Mode).
 

Detailed Description

Modes of the ParaNut Cores.

The CePU can only ever operate in Mode 3 (autonomous). It is still shown as capable of Mode 2 (threaded Mode) because Mode 3 is an extension in functionality in comparison to Mode 2. Mode 2 cores do not handle their own interrupts/exceptions, which a Mode 3 core does.

It can also be set into Mode 0, which does not break hardware debugging support.

The CePU is the only core capable of changing other cores Modes.

The CoPUs are never capable of Mode 3. They may be capable of Mode 2, which means they are able to fetch their own instructions and are therefore able to do different work in parallel to the CePU. They are, at minimum, capable of Mode 1 (linked Mode), which means it will execute the same instructions as the CePU on different data. This does not start until the CePU is also told to now start executing in linked mode, though.

Which Mode the CoPUs are in after system reset is an implementation detail of the ParaNut itself and the startup code.

For further information, check ParaNut Manual.