ParaNut SystemC Model
A SystemC Model of the ParaNut architecture
memory.h
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1 /*************************************************************************
2 
3  This file is part of the ParaNut project.
4 
5  Copyright (C) 2010-2020 Alexander Bahle <alexander.bahle@hs-augsburg.de>
6  Gundolf Kiefer <gundolf.kiefer@hs-augsburg.de>
7  Hochschule Augsburg, University of Applied Sciences
8 
9  Description:
10  This file defines the class 'CMemory', which simulates a memory
11  environment for the testbench of ParaNut.
12 
13  Redistribution and use in source and binary forms, with or without modification,
14  are permitted provided that the following conditions are met:
15 
16  1. Redistributions of source code must retain the above copyright notice, this
17  list of conditions and the following disclaimer.
18 
19  2. Redistributions in binary form must reproduce the above copyright notice,
20  this list of conditions and the following disclaimer in the documentation and/or
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34  *************************************************************************/
35 
36 
37 #ifndef _MEMORY_
38 #define _MEMORY_
39 
40 #include "paranut-peripheral.h"
41 
42 #include <vector>
43 
44 #define LABEL_LEN 80
45 
46 
47 extern class CMemory *mainMemory;
48 
49 
50 class CLabel {
51 public:
52  CLabel (TWord _adr, const char *_name);
53 
55  char name[LABEL_LEN + 1];
56 };
57 
58 
59 class CMemory {
60 public:
62  CMemory (TWord base, TWord size) { Init (base, size); }
63  ~CMemory ();
64 
65  void Init (TWord base, TWord size);
66 
67  bool IsAdressed (TWord adr) { return adr >= base_ && adr < base_ + size_; }
68 
69  // Read & Write...
70  TByte ReadByte (TWord adr) { return data_[adr - base_]; }
71 #if PN_BIG_ENDIAN == 1
73  return ((THalfWord)data[adr - base] << 8) + data[adr - base + 1];
74  }
75  TWord ReadWord (TWord adr) {
76  return ((TWord)data[adr - base] << 24) + ((TWord)data[adr - base + 1] << 16) +
77  ((TWord)data[adr - base + 2] << 8) + ((TWord)data[adr - base + 3]);
78  }
79 #else
80  THalfWord ReadHalfWord (TWord adr) { return *((THalfWord *)(&data_[adr - base_])); }
81  TWord ReadWord (TWord adr) { return *(TWord *)(&data_[adr - base_]); }
83  return *(TDWord *)&data_[adr - base_];
84 // return (*(TWord *)&data_[adr - base_] | (TDWord)((*(TWord *)&data_[adr - base_ + 4])) << 32);
85  }
86 #endif
87 
88  void WriteByte (TWord adr, TByte val) { data_[adr - base_] = val; }
89 #if PN_BIG_ENDIAN == 1
90  void WriteHalfWord (TWord adr, THalfWord val) {
91  data[adr - base] = (TByte) (val >> 8);
92  data[adr - base + 1] = (TByte)val;
93  }
94  void WriteWord (TWord adr, TWord val) {
95  data[adr - base] = (TByte) (val >> 24);
96  data[adr - base + 1] = (TByte) (val >> 16);
97  data[adr - base + 2] = (TByte) (val >> 8);
98  data[adr - base + 3] = (TByte)val;
99  }
100 #else
101  void WriteHalfWord (TWord adr, THalfWord val) {
102  THalfWord *dst = (THalfWord *)&data_[adr - base_];
103  *dst = val;
104  }
105  void WriteWord (TWord adr, TWord val) {
106  TWord *dst = (TWord *)&data_[adr - base_];
107  *dst = val;
108  }
109  void WriteDWord (TWord adr, TDWord val) {
110  TWord *dst = (TWord *)&data_[adr - base_];
111  *dst = val & 0xffffffff;
112 // PN_INFOF (("Write DWORD (0x%08x)0x%016llx: (%p)0x%08x == 0x%08x ", adr, val, dst, val & 0xffffffff, *dst ));
113  *(dst+1) = (TDWord)(val >> 32);
114 // PN_INFOF (("Write DWORD (0x%08x)0x%016llx: (%p)0x%08x == 0x%08x ",adr, val, dst+1, (val & ~0xffffffff) >> 32, *(dst+1)));
115  }
116 #endif
117 
118  // Read ELF...
119  bool ReadFile (const char *filename, const bool dumpVHDL);
120 
121  // Labels...
122  int FindLabel (TWord adr);
123 
124  // Dumping...
125  char *GetDumpStr (TWord adr);
126  char *GetDumpStrVHDL (TWord adr);
127  void Dump (TWord adr0 = 0, TWord adr1 = 0xffffffff);
128  void DumpVHDL (const char *filename, unsigned size);
129  void DumpSignature (const char *filename);
130 
133 
134 protected:
137 
138  std::vector<CLabel> label_list_;
139 
142 };
143 
144 #ifndef __SYNTHESIS__
145 
148 
159 class MWBMemory : public MPeripheral, public CMemory {
160 public:
161  // Only need a Wishbone slave interface inherited from MPeripheral...
162 
163  SC_HAS_PROCESS(MWBMemory); // Necessary when not using SC_MODULE macro
164 
173  MWBMemory(const sc_module_name& name, TWord base, TWord size) : MPeripheral(name), CMemory(base, size),
174  wr_setup(5), rd_setup(5), wr_delay (0), rd_delay (0) {
175  SC_THREAD (MainThread); // Using non synthesizable SC_THREAD to implement wr/rd setup & burst delays
176  sensitive << wb_clk_i.pos();
177  reset_signal_is (wb_rst_i, true);
178  }
179 
180  // Functions...
190  void SetDelays (uint rd_setup, uint rd_delay, uint wr_setup, uint wr_delay);
191 
192 
193  // Processes...
198  void MainThread ();
199 
200 private:
201  // Helper Functions...
202  TDWord ReadMemory (TWord adr, TWord sel);
203  void WriteMemory (TWord adr, TWord sel, TDWord val);
204 
205  // Setup cycles:
206  uint wr_setup;
207  uint rd_setup;
208  // Burst delay:
209  uint wr_delay;
210  uint rd_delay;
211 };
212 
214 
215 #endif
216 
217 #endif
Definition: memory.h:50
CLabel(TWord _adr, const char *_name)
Definition: memory.cpp:53
TWord adr
Definition: memory.h:54
char name[LABEL_LEN+1]
Definition: memory.h:55
Definition: memory.h:59
CMemory(TWord base, TWord size)
Definition: memory.h:62
void WriteHalfWord(TWord adr, THalfWord val)
Definition: memory.h:101
void Dump(TWord adr0=0, TWord adr1=0xffffffff)
Definition: memory.cpp:373
void DumpVHDL(const char *filename, unsigned size)
Definition: memory.cpp:301
void WriteDWord(TWord adr, TDWord val)
Definition: memory.h:109
void WriteByte(TWord adr, TByte val)
Definition: memory.h:88
TWord sig_adr_
Definition: memory.h:141
bool ReadFile(const char *filename, const bool dumpVHDL)
Definition: memory.cpp:121
TWord size_
Definition: memory.h:136
void Init(TWord base, TWord size)
Definition: memory.cpp:66
char * GetDumpStr(TWord adr)
Definition: memory.cpp:346
TWord base_
Definition: memory.h:136
void WriteWord(TWord adr, TWord val)
Definition: memory.h:105
void DumpSignature(const char *filename)
Definition: memory.cpp:393
THalfWord ReadHalfWord(TWord adr)
Definition: memory.h:80
CMemory()
Definition: memory.h:61
TWord sig_adr_end_
Definition: memory.h:141
bool sig_found_
Definition: memory.h:140
TWord tohost_adr
Definition: memory.h:132
TWord ReadWord(TWord adr)
Definition: memory.h:81
std::vector< CLabel > label_list_
Definition: memory.h:138
TByte * data_
Definition: memory.h:135
char * GetDumpStrVHDL(TWord adr)
Definition: memory.cpp:363
TByte ReadByte(TWord adr)
Definition: memory.h:70
TDWord ReadDWord(TWord adr)
Definition: memory.h:82
int FindLabel(TWord adr)
Definition: memory.cpp:334
bool IsAdressed(TWord adr)
Definition: memory.h:67
TWord tdata_adr
Definition: memory.h:131
~CMemory()
Definition: memory.cpp:62
Class containing the interface for Wishbone slave peripherals.
Definition: paranut-peripheral.h:75
sc_in< bool > wb_rst_i
WB Reset input.
Definition: paranut-peripheral.h:81
sc_in_clk wb_clk_i
WB Clock input.
Definition: paranut-peripheral.h:80
Simulation ready configurable Wishbone slave memory.
Definition: memory.h:159
MWBMemory(const sc_module_name &name, TWord base, TWord size)
Create a Wishbone slave memory.
Definition: memory.h:173
void SetDelays(uint rd_setup, uint rd_delay, uint wr_setup, uint wr_delay)
Set read and write setup and delay clock cycles.
Definition: memory.cpp:418
void MainThread()
Main SC_THREAD implements the Wishbone slave interface.
Definition: memory.cpp:471
#define CFG_NUT_MEM_SIZE
System memory size.
Definition: paranut-config.h:121
unsigned TWord
Word type (32 Bit).
Definition: base.h:147
unsigned short THalfWord
Half word type (16 Bit).
Definition: base.h:145
unsigned long long TDWord
Double word type (64 Bit).
Definition: base.h:149
unsigned char TByte
Byte type (8 Bit).
Definition: base.h:143
#define LABEL_LEN
Definition: memory.h:44
class CMemory * mainMemory
Definition: memory.cpp:48
The MPeripheral class containing the interface for Wishbone slave peripherals.