ParaNut SystemC Model
A SystemC Model of the ParaNut architecture
paranut-peripheral.h
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1 /*************************************************************************
2 
3  This file is part of the ParaNut project.
4 
5  Copyright (C) 2020 Alexander Bahle <alexander.bahle@hs-augsburg.de>
6  Hochschule Augsburg, University of Applied Sciences
7 
8  Description:
9  This is a SystemC model of a periphery with a Wishbone slave interface that
10  is compatible with the Interconnect defined in "interconnect.h".
11 
12  Redistribution and use in source and binary forms, with or without modification,
13  are permitted provided that the following conditions are met:
14 
15  1. Redistributions of source code must retain the above copyright notice, this
16  list of conditions and the following disclaimer.
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19  this list of conditions and the following disclaimer in the documentation and/or
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33  *************************************************************************/
34 
35 #ifndef _PARANUT_PERIPHERAL_
36 #define _PARANUT_PERIPHERAL_
37 
38 
41 
42 
43 #include <systemc.h>
44 
45 #include "base.h"
46 #include "paranut-config.h"
47 
48 
55 #define WB_PORT_SIZE CFG_MEMU_BUSIF_WIDTH
56 
57 
65 
75 class MPeripheral : public ::sc_core::sc_module {
76 public:
77 
80  sc_in_clk wb_clk_i;
81  sc_in<bool> wb_rst_i;
82 
83  sc_in<bool> wb_stb_i;
84  sc_in<bool> wb_cyc_i;
85  sc_in<bool> wb_we_i;
86  sc_in<sc_uint<3> > wb_cti_i;
87  sc_in<sc_uint<2> > wb_bte_i;
88  sc_in<sc_uint<WB_PORT_SIZE/8> > wb_sel_i;
89  sc_out<bool> wb_ack_o;
90  sc_out<bool> wb_err_o;
91  sc_out<bool> wb_rty_o;
92 
93  sc_in<sc_uint<32> > wb_adr_i;
94  sc_in<sc_uint<WB_PORT_SIZE> > wb_dat_i;
95  sc_out<sc_uint<WB_PORT_SIZE> > wb_dat_o;
97 
102  MPeripheral (const sc_module_name &name) : sc_module (name),
103  wb_clk_i ("wb_clk_i"), wb_rst_i ("wb_rst_i"),
104  wb_stb_i ("wb_stb_i"), wb_cyc_i ("wb_cyc_i"), wb_we_i ("wb_we_i"), wb_cti_i ("wb_cti_i"),
105  wb_bte_i ("wb_bte_i"), wb_sel_i ("wb_sel_i"),
106  wb_ack_o ("wb_ack_o"), wb_err_o ("wb_err_o"), wb_rty_o ("wb_rty_o"),
107  wb_adr_i ("wb_adr_i"), wb_dat_i ("wb_dat_i"), wb_dat_o ("wb_dat_o")
108  {
109  }
110 
119  void Trace (sc_trace_file * tf, int level = 1);
120 
121 };
122 
124 
125 #endif // _PARANUT_PERIPHERAL_
Helpers, Makros and performance measuring Classes used in most ParaNut files.
Class containing the interface for Wishbone slave peripherals.
Definition: paranut-peripheral.h:75
sc_in< sc_uint< WB_PORT_SIZE/8 > > wb_sel_i
WB byte select inputs.
Definition: paranut-peripheral.h:88
MPeripheral(const sc_module_name &name)
Constructor.
Definition: paranut-peripheral.h:102
sc_out< sc_uint< WB_PORT_SIZE > > wb_dat_o
WB output data bus.
Definition: paranut-peripheral.h:95
sc_in< sc_uint< 3 > > wb_cti_i
WB cycle type identifier (optional, for registered feedback).
Definition: paranut-peripheral.h:86
sc_out< bool > wb_ack_o
WB normal termination.
Definition: paranut-peripheral.h:89
void Trace(sc_trace_file *tf, int level=1)
Trace function definition.
sc_in< bool > wb_cyc_i
WB cycle valid input.
Definition: paranut-peripheral.h:84
sc_in< bool > wb_rst_i
WB Reset input.
Definition: paranut-peripheral.h:81
sc_in< bool > wb_stb_i
WB Strobe input.
Definition: paranut-peripheral.h:83
sc_out< bool > wb_err_o
WB termination w/ error (optional).
Definition: paranut-peripheral.h:90
sc_in< sc_uint< WB_PORT_SIZE > > wb_dat_i
WB input data bus.
Definition: paranut-peripheral.h:94
sc_in< sc_uint< 32 > > wb_adr_i
WB address bus inputs.
Definition: paranut-peripheral.h:93
sc_out< bool > wb_rty_o
WB termination w/ retry (optional).
Definition: paranut-peripheral.h:91
sc_in< sc_uint< 2 > > wb_bte_i
WB burst type extension (optional, for registered feedback).
Definition: paranut-peripheral.h:87
sc_in_clk wb_clk_i
WB Clock input.
Definition: paranut-peripheral.h:80
sc_in< bool > wb_we_i
WB write enable intput.
Definition: paranut-peripheral.h:85
Configuration Makros used in most ParaNut files.
#define WB_PORT_SIZE
Wishbone data port size in bit.
Definition: paranut-peripheral.h:55
sc_trace_file * tf
Definition: tlb_tb.cpp:94