ParaNut SystemC Model
A SystemC Model of the ParaNut architecture
Public Member Functions | Public Attributes | List of all members
MInterconnect Class Reference

#include <interconnect.h>

Inheritance diagram for MInterconnect:
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Collaboration diagram for MInterconnect:
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Public Member Functions

 MInterconnect (sc_module_name name)
 
void Trace (sc_trace_file *tf, int level=1)
 
void AddSlave (TWord start_adr, size_t size, MPeripheral *slave)
 
void AddSlave (TWord start_adr, size_t size, sc_in_clk *wb_clk_i, sc_in< bool > *wb_rst_i, sc_in< bool > *wb_stb_i, sc_in< bool > *wb_cyc_i, sc_in< bool > *wb_we_i, sc_in< sc_uint< 3 > > *wb_cti_i, sc_in< sc_uint< 2 > > *wb_bte_i, sc_in< sc_uint< WB_PORT_SIZE/8 > > *wb_sel_i, sc_out< bool > *wb_ack_o, sc_out< bool > *wb_err_o, sc_out< bool > *wb_rty_o, sc_in< sc_uint< 32 > > *wb_adr_i, sc_in< sc_uint< WB_PORT_SIZE > > *wb_dat_i, sc_out< sc_uint< WB_PORT_SIZE > > *wb_dat_o)
 
void InterconnectMethod ()
 

Public Attributes

sc_in_clk clk_i
 
sc_in< bool > rst_i
 
sc_in< bool > stb_i
 
sc_in< bool > cyc_i
 
sc_in< bool > we_i
 
sc_out< sc_uint< 3 > > cti_i
 
sc_out< sc_uint< 2 > > bte_i
 
sc_in< sc_uint< CFG_MEMU_BUSIF_WIDTH/8 > > sel_i
 
sc_out< bool > ack_o
 
sc_out< bool > err_o
 
sc_out< bool > rty_o
 
sc_in< sc_uint< 32 > > adr_i
 
sc_in< sc_uint< CFG_MEMU_BUSIF_WIDTH > > dat_i
 
sc_out< sc_uint< CFG_MEMU_BUSIF_WIDTH > > dat_o
 

Constructor & Destructor Documentation

◆ MInterconnect()

MInterconnect::MInterconnect ( sc_module_name  name)
inline

Member Function Documentation

◆ AddSlave() [1/2]

void MInterconnect::AddSlave ( TWord  start_adr,
size_t  size,
MPeripheral slave 
)

◆ AddSlave() [2/2]

void MInterconnect::AddSlave ( TWord  start_adr,
size_t  size,
sc_in_clk *  wb_clk_i,
sc_in< bool > *  wb_rst_i,
sc_in< bool > *  wb_stb_i,
sc_in< bool > *  wb_cyc_i,
sc_in< bool > *  wb_we_i,
sc_in< sc_uint< 3 > > *  wb_cti_i,
sc_in< sc_uint< 2 > > *  wb_bte_i,
sc_in< sc_uint< WB_PORT_SIZE/8 > > *  wb_sel_i,
sc_out< bool > *  wb_ack_o,
sc_out< bool > *  wb_err_o,
sc_out< bool > *  wb_rty_o,
sc_in< sc_uint< 32 > > *  wb_adr_i,
sc_in< sc_uint< WB_PORT_SIZE > > *  wb_dat_i,
sc_out< sc_uint< WB_PORT_SIZE > > *  wb_dat_o 
)

◆ InterconnectMethod()

void MInterconnect::InterconnectMethod ( )

◆ Trace()

void MInterconnect::Trace ( sc_trace_file *  tf,
int  level = 1 
)

Member Data Documentation

◆ ack_o

sc_out<bool> MInterconnect::ack_o

◆ adr_i

sc_in<sc_uint<32> > MInterconnect::adr_i

◆ bte_i

sc_out<sc_uint<2> > MInterconnect::bte_i

◆ clk_i

sc_in_clk MInterconnect::clk_i

◆ cti_i

sc_out<sc_uint<3> > MInterconnect::cti_i

◆ cyc_i

sc_in<bool> MInterconnect::cyc_i

◆ dat_i

sc_in<sc_uint<CFG_MEMU_BUSIF_WIDTH> > MInterconnect::dat_i

◆ dat_o

sc_out<sc_uint<CFG_MEMU_BUSIF_WIDTH> > MInterconnect::dat_o

◆ err_o

sc_out<bool> MInterconnect::err_o

◆ rst_i

sc_in<bool> MInterconnect::rst_i

◆ rty_o

sc_out<bool> MInterconnect::rty_o

◆ sel_i

sc_in<sc_uint<CFG_MEMU_BUSIF_WIDTH/8> > MInterconnect::sel_i

◆ stb_i

sc_in<bool> MInterconnect::stb_i

◆ we_i

sc_in<bool> MInterconnect::we_i

The documentation for this class was generated from the following files: