ParaNut SystemC Model
A SystemC Model of the ParaNut architecture
Public Member Functions | Public Attributes | Protected Member Functions | Protected Attributes | List of all members
MExu Class Reference

#include <exu.h>

Inheritance diagram for MExu:
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Collaboration diagram for MExu:
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Public Member Functions

 MExu (sc_module_name name)
 
void Trace (sc_trace_file *tf, int levels=1)
 
void DisplayStatistics ()
 
bool IsHalted ()
 
void AluCombMethod ()
 
void AluShiftMethod ()
 
void MainMethod ()
 
void MainCombMethod ()
 
void DecodeMethod ()
 
void Mode2Method ()
 
void CSRMethod ()
 

Public Attributes

sc_in< bool > clk
 
sc_in< bool > reset
 
sc_out< bool > ifu_next
 
sc_out< bool > ifu_jump
 
sc_out< bool > ifu_flush
 
sc_out< bool > ifu_reset
 
sc_out< sc_uint< 32 > > ifu_jump_adr
 
sc_in< bool > ifu_ir_valid
 
sc_in< bool > ifu_npc_valid
 
sc_in< sc_uint< 32 > > ifu_ir
 
sc_in< sc_uint< 32 > > ifu_pc
 
sc_in< sc_uint< 32 > > ifu_npc
 
sc_in< bool > ifu_ac_x
 
sc_in< bool > ifu_ac_u
 
sc_out< bool > lsu_rd
 
sc_out< bool > lsu_wr
 
sc_out< bool > lsu_flush
 
sc_out< sc_uint< 3 > > lsu_cache_op
 
sc_in< bool > lsu_ack
 
sc_in< bool > lsu_align_err
 
sc_out< sc_uint< 2 > > lsu_width
 
sc_out< bool > lsu_exts
 
sc_out< sc_uint< 32 > > lsu_adr
 
sc_in< sc_uint< 32 > > lsu_rdata
 
sc_out< sc_uint< 32 > > lsu_wdata
 
sc_out< bool > lsu_lres_scond
 
sc_in< bool > lsu_scond_ok
 
sc_out< bool > lsu_trap_u
 
sc_out< bool > lsu_trap_no_u
 
sc_in< bool > lsu_ac_r
 
sc_in< bool > lsu_ac_w
 
sc_in< bool > lsu_ac_u
 
sc_in< bool > xsel
 
sc_in< bool > ex_i
 
sc_out< bool > ex_o
 
sc_in< sc_uint< 5 > > cause_i
 
sc_out< sc_uint< 5 > > cause_o
 
sc_in< bool > sync_i
 
sc_out< bool > sync_o
 
sc_in< bool > sync_next
 
sc_in< bool > m2_ir_valid
 
sc_in< sc_uint< 32 > > m2_ir
 
sc_in< sc_uint< 32 > > m2_pc
 
sc_in< bool > m2_ac_x
 
sc_in< bool > m2_ac_u
 
sc_in< bool > enable
 
sc_in< bool > linked
 
sc_out< bool > haltreq
 
sc_out< sc_uint< CFG_NUT_CPU_CORES > > m3_pnce
 
sc_out< sc_uint< CFG_NUT_CPU_CORES > > m3_pnlm
 
sc_out< sc_uint< CFG_NUT_CPU_CORES > > m3_pnxsel
 
sc_in< sc_uint< CFG_NUT_CPU_CORES > > m3_pnhaltreq
 
sc_in< sc_uint< CFG_NUT_CPU_CORES > > m3_pnx
 
sc_in< sc_uint< 2 > > m3_priv_mode_i
 
sc_out< sc_uint< 2 > > m3_priv_mode_o
 
sc_in< bool > m3_ir_request
 
sc_in< sc_uint< 5 > > m3_ir_id
 
sc_out< bool > m3_ir_ack
 
sc_out< bool > m3_ir_enable
 
sc_out< bool > m3_icache_enable
 
sc_out< bool > m3_dcache_enable
 
sc_in< bool > dbg_req
 
sc_out< bool > csr_dbg
 
sc_out< bool > csr_dbg_reg
 
sc_out< bool > csr_dbg_enter_dreg
 
sc_out< bool > csr_cpu_enabled
 
sc_out< sc_uint< 5 > > csr_ex_id_reg
 
sc_out< bool > csr_sret_dreg
 
sc_out< bool > csr_exu_exception
 
sc_out< bool > csr_irq_dreg
 
sc_out< bool > csr_pop_priv_ir_stack_dreg
 
sc_out< sc_uint< 5 > > csr_csr_rs1_reg
 
sc_out< sc_uint< 32 > > csr_csr_op_a
 
sc_out< sc_uint< 3 > > csr_csr_function_reg
 
sc_out< sc_uint< 12 > > csr_csr_adr_reg
 
sc_out< sc_uint< 32 > > csr_csr_tval
 
sc_out< sc_uint< 32 > > csr_pc
 
sc_out< sc_uint< 32 > > csr_ir
 
sc_out< sc_uint< CFG_NUT_CPU_CORES_LD > > csr_hartID
 
sc_out< bool > csr_inCePU
 
sc_out< bool > csr_linked
 
sc_out< bool > csr_enable
 
sc_out< sc_uint< 5 > > csr_cause
 
sc_out< sc_uint< CFG_NUT_CPU_CORES > > csr_m3_pnhaltreq
 
sc_out< sc_uint< CFG_NUT_CPU_CORES > > csr_m3_pnx
 
sc_out< sc_uint< 2 > > csr_m3_priv_mode
 
sc_out< bool > csr_perf_inc
 
sc_out< sc_uint< CFG_EXU_PERFCOUNTERS_LD > > csr_perf_addr
 
sc_in< bool > csr_exception
 
sc_in< sc_uint< 32 > > csr_rdata
 
sc_in< bool > csr_delegate_dreg
 
sc_in< bool > csr_isHalted
 
sc_in< bool > csr_cache_flush
 
sc_out< bool > csr_ack
 
sc_in< sc_uint< 2 > > csr_priv_mode
 
sc_in< sc_uint< 2 > > csr_load_store_priv_mode
 
sc_in< bool > csr_mstatus_SIE
 
sc_in< bool > csr_mstatus_SUM
 
sc_in< bool > csr_mstatus_MIE
 
sc_in< bool > csr_mstatus_TSR
 
sc_in< bool > csr_mstatus_TVM
 
sc_in< bool > csr_dcsr_ebreakm
 
sc_in< bool > csr_dcsr_step
 
sc_in< sc_uint< 32 > > csr_mideleg
 
sc_in< sc_uint< 32 > > csr_sepc
 
sc_in< sc_uint< 32 > > csr_stvec
 
sc_in< sc_uint< 32 > > csr_mcause
 
sc_in< sc_uint< 32 > > csr_mtvec
 
sc_in< sc_uint< 32 > > csr_dpc
 
sc_in< sc_uint< 32 > > csr_mepc
 
sc_in< sc_uint< 32 > > csr_mip
 
sc_in< sc_uint< CFG_NUT_CPU_CORES > > csr_m3_pnce
 
sc_in< sc_uint< CFG_NUT_CPU_CORES > > csr_m3_pnlm
 
sc_in< sc_uint< CFG_NUT_CPU_CORES > > csr_m3_pnxsel
 
sc_in< bool > csr_m3_icache_enable
 
sc_in< bool > csr_m3_dcache_enable
 
sc_in< bool > csr_lsu_paging_mode
 
sc_in< bool > csr_ifu_paging_mode
 
sc_in< sc_uint< 20 > > csr_satp_root_ppn
 
sc_out< bool > tlb_flush
 
sc_out< bool > ifu_paging_mode
 
sc_out< bool > lsu_paging_mode
 
sc_out< sc_uint< 20 > > root_ppn
 
sc_in< sc_uint< CFG_NUT_CPU_CORES_LD > > hartID
 
sc_in< bool > inCePU
 
sc_in< bool > mode2Cap
 

Protected Member Functions

void InstructionTrace ()
 
void DumpRegisterInfo ()
 
void DumpRegisterChange ()
 

Protected Attributes

sc_signal< bool > dbg
 
sc_signal< bool > dbg_reg
 
sc_signal< sc_uint< 5 > > ex_id
 
sc_signal< sc_uint< 5 > > ex_id_reg
 
sc_signal< bool > ex_handle_reg
 
sc_signal< bool > ex_handle
 
sc_signal< bool > exception
 
sc_signal< bool > ignore_ir_reg
 
sc_signal< bool > ignore_ir
 
sc_signal< bool > m3_ir_request_reg
 
sc_signal< sc_uint< 32 > > gp_regs [REGISTERS]
 
sc_signal< sc_uint< 32 > > gpr_in
 
sc_signal< bool > gpr_write
 
sc_signal< sc_uint< EX_ID_LENGTH > > state_reg
 
sc_signal< sc_uint< EX_ID_LENGTH > > state
 
sc_signal< bool > stall_decode
 
sc_signal< bool > internal_next
 
sc_signal< bool > sync_reg
 
sc_signal< bool > sync
 
sc_signal< bool > ir_valid
 
sc_signal< sc_uint< 32 > > ir
 
sc_signal< sc_uint< 32 > > pc
 
sc_signal< bool > ac_x
 
sc_signal< bool > ac_u
 
sc_signal< sc_uint< 3 > > csr_function_reg
 
sc_signal< sc_uint< 12 > > csr_adr_reg
 
sc_signal< sc_uint< 5 > > csr_rs1_reg
 
sc_signal< bool > csr_instr
 
sc_signal< sc_uint< 32 > > csr_op_a
 
sc_signal< sc_uint< 32 > > csr_tval
 
sc_signal< bool > alu_finished
 
sc_signal< bool > alu_branch
 
sc_signal< sc_uint< 32 > > alu_result
 
sc_signal< sc_uint< 32 > > alu_result_reg
 
sc_signal< bool > alu_branch_reg
 
sc_signal< sc_uint< 2 > > alu_s_function
 
sc_signal< sc_uint< 5 > > alu_s_amount
 
sc_signal< bool > alu_s_ready
 
sc_signal< bool > alu_s_enable
 
sc_signal< sc_uint< 32 > > alu_s_result
 
MMExtension mext
 
sc_signal< bool > alu_m_enable
 
sc_signal< bool > alu_m_valid
 
sc_signal< sc_uint< 32 > > alu_m_result
 
sc_signal< bool > alu_d_enable
 
sc_signal< bool > alu_d_valid
 
sc_signal< sc_uint< 32 > > alu_d_result
 
sc_signal< bool > alu_md_dreg
 
sc_signal< sc_uint< 2 > > alu_md_function_dreg
 
sc_signal< bool > perf_inc
 
sc_signal< sc_uint< CFG_EXU_PERFCOUNTERS_LD > > perf_addr
 
sc_signal< sc_uint< 32 > > op_a_dreg
 
sc_signal< sc_uint< 32 > > op_b_dreg
 
sc_signal< sc_uint< 32 > > branch_a_dreg
 
sc_signal< sc_uint< 32 > > branch_b_dreg
 
sc_signal< sc_uint< 5 > > gpr_sel_dreg
 
sc_signal< bool > sret_dreg
 
sc_signal< bool > xret_dreg
 
sc_signal< bool > pop_priv_ir_stack_dreg
 
sc_signal< bool > alu_af_dreg
 
sc_signal< bool > alu_branch_dreg
 
sc_signal< bool > illegal_insn_dreg
 
sc_signal< bool > insn_page_fault_dreg
 
sc_signal< bool > ex_CoPU_dreg
 
sc_signal< bool > irq_dreg
 
sc_signal< bool > step_dreg
 
sc_signal< bool > ecall_dreg
 
sc_signal< bool > ebreak_dreg
 
sc_signal< bool > flush_dreg
 
sc_signal< bool > lsu_rd_dreg
 
sc_signal< bool > lres_scond_dreg
 
sc_signal< bool > dbg_enter_dreg
 
sc_signal< sc_uint< 2 > > lsu_width_dreg
 
sc_signal< sc_uint< 3 > > cache_op_dreg
 
sc_signal< sc_uint< 4 > > exu_op_dreg
 
sc_signal< sc_uint< 4 > > alu_function_dreg
 
CPerfMonCPU perf_mon_
 

Constructor & Destructor Documentation

◆ MExu()

MExu::MExu ( sc_module_name  name)
inline

Member Function Documentation

◆ AluCombMethod()

void MExu::AluCombMethod ( )

◆ AluShiftMethod()

void MExu::AluShiftMethod ( )

◆ CSRMethod()

void MExu::CSRMethod ( )

◆ DecodeMethod()

void MExu::DecodeMethod ( )

◆ DisplayStatistics()

void MExu::DisplayStatistics ( )
inline

◆ DumpRegisterChange()

void MExu::DumpRegisterChange ( )
protected

◆ DumpRegisterInfo()

void MExu::DumpRegisterInfo ( )
protected

◆ InstructionTrace()

void MExu::InstructionTrace ( )
protected

◆ IsHalted()

bool MExu::IsHalted ( )
inline

◆ MainCombMethod()

void MExu::MainCombMethod ( )

◆ MainMethod()

void MExu::MainMethod ( )

◆ Mode2Method()

void MExu::Mode2Method ( )

◆ Trace()

void MExu::Trace ( sc_trace_file *  tf,
int  levels = 1 
)

Member Data Documentation

◆ ac_u

sc_signal<bool> MExu::ac_u
protected

◆ ac_x

sc_signal<bool> MExu::ac_x
protected

◆ alu_af_dreg

sc_signal<bool> MExu::alu_af_dreg
protected

◆ alu_branch

sc_signal<bool> MExu::alu_branch
protected

◆ alu_branch_dreg

sc_signal<bool> MExu::alu_branch_dreg
protected

◆ alu_branch_reg

sc_signal<bool> MExu::alu_branch_reg
protected

◆ alu_d_enable

sc_signal<bool> MExu::alu_d_enable
protected

◆ alu_d_result

sc_signal<sc_uint<32> > MExu::alu_d_result
protected

◆ alu_d_valid

sc_signal<bool> MExu::alu_d_valid
protected

◆ alu_finished

sc_signal<bool> MExu::alu_finished
protected

◆ alu_function_dreg

sc_signal<sc_uint<4> > MExu::alu_function_dreg
protected

◆ alu_m_enable

sc_signal<bool> MExu::alu_m_enable
protected

◆ alu_m_result

sc_signal<sc_uint<32> > MExu::alu_m_result
protected

◆ alu_m_valid

sc_signal<bool> MExu::alu_m_valid
protected

◆ alu_md_dreg

sc_signal<bool> MExu::alu_md_dreg
protected

◆ alu_md_function_dreg

sc_signal<sc_uint<2> > MExu::alu_md_function_dreg
protected

◆ alu_result

sc_signal<sc_uint<32> > MExu::alu_result
protected

◆ alu_result_reg

sc_signal<sc_uint<32> > MExu::alu_result_reg
protected

◆ alu_s_amount

sc_signal<sc_uint<5> > MExu::alu_s_amount
protected

◆ alu_s_enable

sc_signal<bool> MExu::alu_s_enable
protected

◆ alu_s_function

sc_signal<sc_uint<2> > MExu::alu_s_function
protected

◆ alu_s_ready

sc_signal<bool> MExu::alu_s_ready
protected

◆ alu_s_result

sc_signal<sc_uint<32> > MExu::alu_s_result
protected

◆ branch_a_dreg

sc_signal<sc_uint<32> > MExu::branch_a_dreg
protected

◆ branch_b_dreg

sc_signal<sc_uint<32> > MExu::branch_b_dreg
protected

◆ cache_op_dreg

sc_signal<sc_uint<3> > MExu::cache_op_dreg
protected

◆ cause_i

sc_in<sc_uint<5> > MExu::cause_i

◆ cause_o

sc_out<sc_uint<5> > MExu::cause_o

◆ clk

sc_in<bool> MExu::clk

◆ csr_ack

sc_out<bool> MExu::csr_ack

◆ csr_adr_reg

sc_signal<sc_uint<12> > MExu::csr_adr_reg
protected

◆ csr_cache_flush

sc_in<bool> MExu::csr_cache_flush

◆ csr_cause

sc_out<sc_uint<5> > MExu::csr_cause

◆ csr_cpu_enabled

sc_out<bool> MExu::csr_cpu_enabled

◆ csr_csr_adr_reg

sc_out<sc_uint<12> > MExu::csr_csr_adr_reg

◆ csr_csr_function_reg

sc_out<sc_uint<3> > MExu::csr_csr_function_reg

◆ csr_csr_op_a

sc_out<sc_uint<32> > MExu::csr_csr_op_a

◆ csr_csr_rs1_reg

sc_out<sc_uint<5> > MExu::csr_csr_rs1_reg

◆ csr_csr_tval

sc_out<sc_uint<32> > MExu::csr_csr_tval

◆ csr_dbg

sc_out<bool> MExu::csr_dbg

◆ csr_dbg_enter_dreg

sc_out<bool> MExu::csr_dbg_enter_dreg

◆ csr_dbg_reg

sc_out<bool> MExu::csr_dbg_reg

◆ csr_dcsr_ebreakm

sc_in<bool> MExu::csr_dcsr_ebreakm

◆ csr_dcsr_step

sc_in<bool> MExu::csr_dcsr_step

◆ csr_delegate_dreg

sc_in<bool> MExu::csr_delegate_dreg

◆ csr_dpc

sc_in<sc_uint<32> > MExu::csr_dpc

◆ csr_enable

sc_out<bool> MExu::csr_enable

◆ csr_ex_id_reg

sc_out<sc_uint<5> > MExu::csr_ex_id_reg

◆ csr_exception

sc_in<bool> MExu::csr_exception

◆ csr_exu_exception

sc_out<bool> MExu::csr_exu_exception

◆ csr_function_reg

sc_signal<sc_uint<3> > MExu::csr_function_reg
protected

◆ csr_hartID

sc_out<sc_uint<CFG_NUT_CPU_CORES_LD> > MExu::csr_hartID

◆ csr_ifu_paging_mode

sc_in<bool> MExu::csr_ifu_paging_mode

◆ csr_inCePU

sc_out<bool> MExu::csr_inCePU

◆ csr_instr

sc_signal<bool> MExu::csr_instr
protected

◆ csr_ir

sc_out<sc_uint<32> > MExu::csr_ir

◆ csr_irq_dreg

sc_out<bool> MExu::csr_irq_dreg

◆ csr_isHalted

sc_in<bool> MExu::csr_isHalted

◆ csr_linked

sc_out<bool> MExu::csr_linked

◆ csr_load_store_priv_mode

sc_in<sc_uint<2> > MExu::csr_load_store_priv_mode

◆ csr_lsu_paging_mode

sc_in<bool> MExu::csr_lsu_paging_mode

◆ csr_m3_dcache_enable

sc_in<bool> MExu::csr_m3_dcache_enable

◆ csr_m3_icache_enable

sc_in<bool> MExu::csr_m3_icache_enable

◆ csr_m3_pnce

sc_in<sc_uint<CFG_NUT_CPU_CORES> > MExu::csr_m3_pnce

◆ csr_m3_pnhaltreq

sc_out<sc_uint<CFG_NUT_CPU_CORES> > MExu::csr_m3_pnhaltreq

◆ csr_m3_pnlm

sc_in<sc_uint<CFG_NUT_CPU_CORES> > MExu::csr_m3_pnlm

◆ csr_m3_pnx

sc_out<sc_uint<CFG_NUT_CPU_CORES> > MExu::csr_m3_pnx

◆ csr_m3_pnxsel

sc_in<sc_uint<CFG_NUT_CPU_CORES> > MExu::csr_m3_pnxsel

◆ csr_m3_priv_mode

sc_out<sc_uint<2> > MExu::csr_m3_priv_mode

◆ csr_mcause

sc_in<sc_uint<32> > MExu::csr_mcause

◆ csr_mepc

sc_in<sc_uint<32> > MExu::csr_mepc

◆ csr_mideleg

sc_in<sc_uint<32> > MExu::csr_mideleg

◆ csr_mip

sc_in<sc_uint<32> > MExu::csr_mip

◆ csr_mstatus_MIE

sc_in<bool> MExu::csr_mstatus_MIE

◆ csr_mstatus_SIE

sc_in<bool> MExu::csr_mstatus_SIE

◆ csr_mstatus_SUM

sc_in<bool> MExu::csr_mstatus_SUM

◆ csr_mstatus_TSR

sc_in<bool> MExu::csr_mstatus_TSR

◆ csr_mstatus_TVM

sc_in<bool> MExu::csr_mstatus_TVM

◆ csr_mtvec

sc_in<sc_uint<32> > MExu::csr_mtvec

◆ csr_op_a

sc_signal<sc_uint<32> > MExu::csr_op_a
protected

◆ csr_pc

sc_out<sc_uint<32> > MExu::csr_pc

◆ csr_perf_addr

sc_out<sc_uint<CFG_EXU_PERFCOUNTERS_LD> > MExu::csr_perf_addr

◆ csr_perf_inc

sc_out<bool> MExu::csr_perf_inc

◆ csr_pop_priv_ir_stack_dreg

sc_out<bool> MExu::csr_pop_priv_ir_stack_dreg

◆ csr_priv_mode

sc_in<sc_uint<2> > MExu::csr_priv_mode

◆ csr_rdata

sc_in<sc_uint<32> > MExu::csr_rdata

◆ csr_rs1_reg

sc_signal<sc_uint<5> > MExu::csr_rs1_reg
protected

◆ csr_satp_root_ppn

sc_in<sc_uint<20> > MExu::csr_satp_root_ppn

◆ csr_sepc

sc_in<sc_uint<32> > MExu::csr_sepc

◆ csr_sret_dreg

sc_out<bool> MExu::csr_sret_dreg

◆ csr_stvec

sc_in<sc_uint<32> > MExu::csr_stvec

◆ csr_tval

sc_signal<sc_uint<32> > MExu::csr_tval
protected

◆ dbg

sc_signal<bool> MExu::dbg
protected

◆ dbg_enter_dreg

sc_signal<bool> MExu::dbg_enter_dreg
protected

◆ dbg_reg

sc_signal<bool> MExu::dbg_reg
protected

◆ dbg_req

sc_in<bool> MExu::dbg_req

◆ ebreak_dreg

sc_signal<bool> MExu::ebreak_dreg
protected

◆ ecall_dreg

sc_signal<bool> MExu::ecall_dreg
protected

◆ enable

sc_in<bool> MExu::enable

◆ ex_CoPU_dreg

sc_signal<bool> MExu::ex_CoPU_dreg
protected

◆ ex_handle

sc_signal<bool> MExu::ex_handle
protected

◆ ex_handle_reg

sc_signal<bool> MExu::ex_handle_reg
protected

◆ ex_i

sc_in<bool> MExu::ex_i

◆ ex_id

sc_signal<sc_uint<5> > MExu::ex_id
protected

◆ ex_id_reg

sc_signal<sc_uint<5> > MExu::ex_id_reg
protected

◆ ex_o

sc_out<bool> MExu::ex_o

◆ exception

sc_signal<bool> MExu::exception
protected

◆ exu_op_dreg

sc_signal<sc_uint<4> > MExu::exu_op_dreg
protected

◆ flush_dreg

sc_signal<bool> MExu::flush_dreg
protected

◆ gp_regs

sc_signal<sc_uint<32> > MExu::gp_regs[REGISTERS]
protected

◆ gpr_in

sc_signal<sc_uint<32> > MExu::gpr_in
protected

◆ gpr_sel_dreg

sc_signal<sc_uint<5> > MExu::gpr_sel_dreg
protected

◆ gpr_write

sc_signal<bool> MExu::gpr_write
protected

◆ haltreq

sc_out<bool> MExu::haltreq

◆ hartID

sc_in<sc_uint<CFG_NUT_CPU_CORES_LD> > MExu::hartID

◆ ifu_ac_u

sc_in<bool> MExu::ifu_ac_u

◆ ifu_ac_x

sc_in<bool> MExu::ifu_ac_x

◆ ifu_flush

sc_out<bool> MExu::ifu_flush

◆ ifu_ir

sc_in<sc_uint<32> > MExu::ifu_ir

◆ ifu_ir_valid

sc_in<bool> MExu::ifu_ir_valid

◆ ifu_jump

sc_out<bool> MExu::ifu_jump

◆ ifu_jump_adr

sc_out<sc_uint<32> > MExu::ifu_jump_adr

◆ ifu_next

sc_out<bool> MExu::ifu_next

◆ ifu_npc

sc_in<sc_uint<32> > MExu::ifu_npc

◆ ifu_npc_valid

sc_in<bool> MExu::ifu_npc_valid

◆ ifu_paging_mode

sc_out<bool> MExu::ifu_paging_mode

◆ ifu_pc

sc_in<sc_uint<32> > MExu::ifu_pc

◆ ifu_reset

sc_out<bool> MExu::ifu_reset

◆ ignore_ir

sc_signal<bool> MExu::ignore_ir
protected

◆ ignore_ir_reg

sc_signal<bool> MExu::ignore_ir_reg
protected

◆ illegal_insn_dreg

sc_signal<bool> MExu::illegal_insn_dreg
protected

◆ inCePU

sc_in<bool> MExu::inCePU

◆ insn_page_fault_dreg

sc_signal<bool> MExu::insn_page_fault_dreg
protected

◆ internal_next

sc_signal<bool> MExu::internal_next
protected

◆ ir

sc_signal<sc_uint<32> > MExu::ir
protected

◆ ir_valid

sc_signal<bool> MExu::ir_valid
protected

◆ irq_dreg

sc_signal<bool> MExu::irq_dreg
protected

◆ linked

sc_in<bool> MExu::linked

◆ lres_scond_dreg

sc_signal<bool> MExu::lres_scond_dreg
protected

◆ lsu_ac_r

sc_in<bool> MExu::lsu_ac_r

◆ lsu_ac_u

sc_in<bool> MExu::lsu_ac_u

◆ lsu_ac_w

sc_in<bool> MExu::lsu_ac_w

◆ lsu_ack

sc_in<bool> MExu::lsu_ack

◆ lsu_adr

sc_out<sc_uint<32> > MExu::lsu_adr

◆ lsu_align_err

sc_in<bool> MExu::lsu_align_err

◆ lsu_cache_op

sc_out<sc_uint<3> > MExu::lsu_cache_op

◆ lsu_exts

sc_out<bool> MExu::lsu_exts

◆ lsu_flush

sc_out<bool> MExu::lsu_flush

◆ lsu_lres_scond

sc_out<bool> MExu::lsu_lres_scond

◆ lsu_paging_mode

sc_out<bool> MExu::lsu_paging_mode

◆ lsu_rd

sc_out<bool> MExu::lsu_rd

◆ lsu_rd_dreg

sc_signal<bool> MExu::lsu_rd_dreg
protected

◆ lsu_rdata

sc_in<sc_uint<32> > MExu::lsu_rdata

◆ lsu_scond_ok

sc_in<bool> MExu::lsu_scond_ok

◆ lsu_trap_no_u

sc_out<bool> MExu::lsu_trap_no_u

◆ lsu_trap_u

sc_out<bool> MExu::lsu_trap_u

◆ lsu_wdata

sc_out<sc_uint<32> > MExu::lsu_wdata

◆ lsu_width

sc_out<sc_uint<2> > MExu::lsu_width

◆ lsu_width_dreg

sc_signal<sc_uint<2> > MExu::lsu_width_dreg
protected

◆ lsu_wr

sc_out<bool> MExu::lsu_wr

◆ m2_ac_u

sc_in<bool> MExu::m2_ac_u

◆ m2_ac_x

sc_in<bool> MExu::m2_ac_x

◆ m2_ir

sc_in<sc_uint<32> > MExu::m2_ir

◆ m2_ir_valid

sc_in<bool> MExu::m2_ir_valid

◆ m2_pc

sc_in<sc_uint<32> > MExu::m2_pc

◆ m3_dcache_enable

sc_out<bool> MExu::m3_dcache_enable

◆ m3_icache_enable

sc_out<bool> MExu::m3_icache_enable

◆ m3_ir_ack

sc_out<bool> MExu::m3_ir_ack

◆ m3_ir_enable

sc_out<bool> MExu::m3_ir_enable

◆ m3_ir_id

sc_in<sc_uint<5> > MExu::m3_ir_id

◆ m3_ir_request

sc_in<bool> MExu::m3_ir_request

◆ m3_ir_request_reg

sc_signal<bool> MExu::m3_ir_request_reg
protected

◆ m3_pnce

sc_out<sc_uint<CFG_NUT_CPU_CORES> > MExu::m3_pnce

◆ m3_pnhaltreq

sc_in<sc_uint<CFG_NUT_CPU_CORES> > MExu::m3_pnhaltreq

◆ m3_pnlm

sc_out<sc_uint<CFG_NUT_CPU_CORES> > MExu::m3_pnlm

◆ m3_pnx

sc_in<sc_uint<CFG_NUT_CPU_CORES> > MExu::m3_pnx

◆ m3_pnxsel

sc_out<sc_uint<CFG_NUT_CPU_CORES> > MExu::m3_pnxsel

◆ m3_priv_mode_i

sc_in<sc_uint<2> > MExu::m3_priv_mode_i

◆ m3_priv_mode_o

sc_out<sc_uint<2> > MExu::m3_priv_mode_o

◆ mext

MMExtension MExu::mext
protected

◆ mode2Cap

sc_in<bool> MExu::mode2Cap

◆ op_a_dreg

sc_signal<sc_uint<32> > MExu::op_a_dreg
protected

◆ op_b_dreg

sc_signal<sc_uint<32> > MExu::op_b_dreg
protected

◆ pc

sc_signal<sc_uint<32> > MExu::pc
protected

◆ perf_addr

sc_signal<sc_uint<CFG_EXU_PERFCOUNTERS_LD> > MExu::perf_addr
protected

◆ perf_inc

sc_signal<bool> MExu::perf_inc
protected

◆ perf_mon_

CPerfMonCPU MExu::perf_mon_
protected

◆ pop_priv_ir_stack_dreg

sc_signal<bool> MExu::pop_priv_ir_stack_dreg
protected

◆ reset

sc_in<bool> MExu::reset

◆ root_ppn

sc_out<sc_uint<20> > MExu::root_ppn

◆ sret_dreg

sc_signal<bool> MExu::sret_dreg
protected

◆ stall_decode

sc_signal<bool> MExu::stall_decode
protected

◆ state

sc_signal<sc_uint<EX_ID_LENGTH> > MExu::state
protected

◆ state_reg

sc_signal<sc_uint<EX_ID_LENGTH> > MExu::state_reg
protected

◆ step_dreg

sc_signal<bool> MExu::step_dreg
protected

◆ sync

sc_signal<bool> MExu::sync
protected

◆ sync_i

sc_in<bool> MExu::sync_i

◆ sync_next

sc_in<bool> MExu::sync_next

◆ sync_o

sc_out<bool> MExu::sync_o

◆ sync_reg

sc_signal<bool> MExu::sync_reg
protected

◆ tlb_flush

sc_out<bool> MExu::tlb_flush

◆ xret_dreg

sc_signal<bool> MExu::xret_dreg
protected

◆ xsel

sc_in<bool> MExu::xsel

The documentation for this class was generated from the following files: