ParaNut SystemC Model
A SystemC Model of the ParaNut architecture
Public Member Functions | Public Attributes | Protected Types | Protected Member Functions | Protected Attributes | Static Protected Attributes | List of all members
MArbiter Class Reference

#include <memu.h>

Inheritance diagram for MArbiter:
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Collaboration diagram for MArbiter:
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Public Member Functions

 MArbiter (sc_module_name name)
 
 ~MArbiter ()
 
void Trace (sc_trace_file *tf, int level=1)
 
void LineLockMethod ()
 
void TagMethod ()
 
void BankMethod ()
 
void BusIfMethod ()
 
void SnoopMethod ()
 
void PrioCPUMethod ()
 
void TransitionThread ()
 

Public Attributes

sc_in< bool > clk
 
sc_in< bool > reset
 
sc_in< sc_uint< 32 > > wiadr_busif
 
sc_in< sc_uint< 32 > > wiadr_rp [CFG_MEMU_RPORTS]
 
sc_in< sc_uint< 32 > > adr_wp [CFG_MEMU_WPORTS]
 
sc_in< sc_uint< 32 > > way_wp [CFG_MEMU_WPORTS]
 
sc_out< sc_uint< 32 > > wiadr_bank [CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
 
sc_out< sc_uint< 32 > > snoop_adr
 
sc_out< bool > snoop_stb [CFG_MEMU_WPORTS]
 
sc_in< bool > req_busif_linelock
 
sc_in< bool > req_wp_linelock [CFG_MEMU_WPORTS]
 
sc_out< bool > gnt_busif_linelock
 
sc_out< bool > gnt_wp_linelock [CFG_MEMU_WPORTS]
 
sc_in< bool > tagram_ready
 
sc_in< bool > req_busif_tagw
 
sc_in< bool > req_wp_tagw [CFG_MEMU_WPORTS]
 
sc_in< bool > req_busif_tagr
 
sc_in< bool > req_wp_tagr [CFG_MEMU_WPORTS]
 
sc_in< bool > req_rp_tagr [CFG_MEMU_RPORTS]
 
sc_out< bool > gnt_busif_tagw
 
sc_out< bool > gnt_wp_tagw [CFG_MEMU_WPORTS]
 
sc_out< bool > gnt_busif_tagr
 
sc_out< bool > gnt_wp_tagr [CFG_MEMU_WPORTS]
 
sc_out< bool > gnt_rp_tagr [CFG_MEMU_RPORTS]
 
sc_out< bool > gnt_busif_tagw_r
 
sc_out< bool > gnt_wp_tagw_r [CFG_MEMU_WPORTS]
 
sc_out< bool > gnt_busif_tagr_r
 
sc_out< bool > gnt_wp_tagr_r [CFG_MEMU_WPORTS]
 
sc_out< bool > gnt_rp_tagr_r [CFG_MEMU_RPORTS]
 
sc_in< bool > req_busif_bank [CFG_MEMU_CACHE_BANKS]
 
sc_in< bool > req_wp_bank [CFG_MEMU_WPORTS][CFG_MEMU_CACHE_BANKS]
 
sc_in< bool > req_rp_bank [CFG_MEMU_RPORTS][CFG_MEMU_CACHE_BANKS]
 
sc_out< bool > gnt_busif_bank [CFG_MEMU_CACHE_BANKS]
 
sc_out< bool > gnt_wp_bank [CFG_MEMU_WPORTS][CFG_MEMU_CACHE_BANKS]
 
sc_out< bool > gnt_rp_bank [CFG_MEMU_RPORTS][CFG_MEMU_CACHE_BANKS]
 
sc_in< bool > req_rp_busif [CFG_MEMU_RPORTS]
 
sc_in< bool > req_wp_busif [CFG_MEMU_WPORTS]
 
sc_out< bool > gnt_rp_busif [CFG_MEMU_RPORTS]
 
sc_out< bool > gnt_wp_busif [CFG_MEMU_WPORTS]
 

Protected Types

typedef MSelectorPass< 1,(CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+1)> BusIfSelectorPass_t
 
typedef MSelector< 1,(CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+1)> BusifSelector_t
 
typedef MSelectorPass< 1, CFG_MEMU_WPORTSLineLockSelectorPass_t
 
typedef MSelector< 1, CFG_MEMU_WPORTSLineLockSelector_t
 
typedef MSelectorPass< CFG_MEMU_CACHE_WAYS_LD+CFG_MEMU_CACHE_SETS_LD,(CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+SINGLE_CPU)/CFG_MEMU_BANK_RAM_PORTSBankSelectorPass_t
 
typedef MSelector< CFG_MEMU_CACHE_WAYS_LD+CFG_MEMU_CACHE_SETS_LD,(CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+SINGLE_CPU)/CFG_MEMU_BANK_RAM_PORTSBankSelector_t
 

Protected Member Functions

int GetPrioCpu ()
 

Protected Attributes

sc_signal< sc_uint< 16 > > counter_reg
 
sc_signal< sc_uint< CFG_MEMU_WPORTS+1 > > linelock_reg
 
sc_signal< sc_uint< CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+1 > > tagr_reg
 
sc_signal< sc_uint< CFG_MEMU_WPORTS+1 > > req_tagw_reg
 
sc_signal< sc_uint< CFG_MEMU_WPORTS+1 > > tagw_reg
 
sc_signal< sc_uint<((CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+(CFG_NUT_CPU_CORES_LD==0))/CFG_MEMU_BANK_RAM_PORTS)+1 > > bank_reg [CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
 
sc_signal< sc_uint< CFG_MEMU_RPORTS+CFG_MEMU_WPORTS > > busif_reg
 
sc_signal< sc_uint< CFG_MEMU_WPORTS+1 > > next_linelock_reg
 
sc_signal< sc_uint< CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+1 > > next_tagr_reg
 
sc_signal< sc_uint< CFG_MEMU_WPORTS+1 > > next_req_tagw_reg
 
sc_signal< sc_uint< CFG_MEMU_WPORTS+1 > > next_tagw_reg
 
sc_signal< sc_uint<((CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+(CFG_NUT_CPU_CORES_LD==0))/CFG_MEMU_BANK_RAM_PORTS)+1 > > next_bank_reg [CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
 
sc_signal< sc_uint< CFG_MEMU_RPORTS+CFG_MEMU_WPORTS > > next_busif_reg
 
sc_signal< sc_uint< MAX(1, CFG_NUT_CPU_CORES_LD)> > cpu_prio
 
sc_module * busif_sel
 
sc_signal< SSelectorIO< 1,(CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+1)> > busif_sel_out
 
sc_signal< SSelectorIO< 1,(CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+1)> > busif_sel_in [2]
 
sc_module * linelock_sel
 
sc_signal< SSelectorIO< 1, CFG_MEMU_WPORTS > > linelock_sel_out
 
sc_signal< SSelectorIO< 1, CFG_MEMU_WPORTS > > linelock_sel_in [2]
 
sc_module * bank_sel [CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
 
sc_signal< SSelectorIO< CFG_MEMU_CACHE_WAYS_LD+CFG_MEMU_CACHE_SETS_LD,(CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+SINGLE_CPU)/CFG_MEMU_BANK_RAM_PORTS > > bank_sel_out [CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
 
sc_signal< SSelectorIO< CFG_MEMU_CACHE_WAYS_LD+CFG_MEMU_CACHE_SETS_LD,(CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+SINGLE_CPU)/CFG_MEMU_BANK_RAM_PORTS > > bank_sel_in [CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS][2]
 

Static Protected Attributes

static const bool SINGLE_CPU = CFG_NUT_CPU_CORES == 1
 

Member Typedef Documentation

◆ BankSelector_t

◆ BankSelectorPass_t

◆ BusifSelector_t

◆ BusIfSelectorPass_t

◆ LineLockSelector_t

◆ LineLockSelectorPass_t

Constructor & Destructor Documentation

◆ MArbiter()

MArbiter::MArbiter ( sc_module_name  name)
inline

◆ ~MArbiter()

MArbiter::~MArbiter ( )

Member Function Documentation

◆ BankMethod()

void MArbiter::BankMethod ( )

◆ BusIfMethod()

void MArbiter::BusIfMethod ( )

◆ GetPrioCpu()

int MArbiter::GetPrioCpu ( )
protected

◆ LineLockMethod()

void MArbiter::LineLockMethod ( )

◆ PrioCPUMethod()

void MArbiter::PrioCPUMethod ( )

◆ SnoopMethod()

void MArbiter::SnoopMethod ( )

◆ TagMethod()

void MArbiter::TagMethod ( )

◆ Trace()

void MArbiter::Trace ( sc_trace_file *  tf,
int  level = 1 
)

◆ TransitionThread()

void MArbiter::TransitionThread ( )

Member Data Documentation

◆ adr_wp

sc_in<sc_uint<32> > MArbiter::adr_wp[CFG_MEMU_WPORTS]

◆ bank_reg

◆ bank_sel

sc_module* MArbiter::bank_sel[CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
protected

◆ bank_sel_in

◆ bank_sel_out

◆ busif_reg

sc_signal<sc_uint<CFG_MEMU_RPORTS + CFG_MEMU_WPORTS> > MArbiter::busif_reg
protected

◆ busif_sel

sc_module* MArbiter::busif_sel
protected

◆ busif_sel_in

sc_signal<SSelectorIO<1, (CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+1)> > MArbiter::busif_sel_in[2]
protected

◆ busif_sel_out

sc_signal<SSelectorIO<1, (CFG_MEMU_RPORTS+CFG_MEMU_WPORTS+1)> > MArbiter::busif_sel_out
protected

◆ clk

sc_in<bool> MArbiter::clk

◆ counter_reg

sc_signal<sc_uint<16> > MArbiter::counter_reg
protected

◆ cpu_prio

sc_signal<sc_uint<MAX(1, CFG_NUT_CPU_CORES_LD)> > MArbiter::cpu_prio
protected

◆ gnt_busif_bank

sc_out<bool> MArbiter::gnt_busif_bank[CFG_MEMU_CACHE_BANKS]

◆ gnt_busif_linelock

sc_out<bool> MArbiter::gnt_busif_linelock

◆ gnt_busif_tagr

sc_out<bool> MArbiter::gnt_busif_tagr

◆ gnt_busif_tagr_r

sc_out<bool> MArbiter::gnt_busif_tagr_r

◆ gnt_busif_tagw

sc_out<bool> MArbiter::gnt_busif_tagw

◆ gnt_busif_tagw_r

sc_out<bool> MArbiter::gnt_busif_tagw_r

◆ gnt_rp_bank

sc_out<bool> MArbiter::gnt_rp_bank[CFG_MEMU_RPORTS][CFG_MEMU_CACHE_BANKS]

◆ gnt_rp_busif

sc_out<bool> MArbiter::gnt_rp_busif[CFG_MEMU_RPORTS]

◆ gnt_rp_tagr

sc_out<bool> MArbiter::gnt_rp_tagr[CFG_MEMU_RPORTS]

◆ gnt_rp_tagr_r

sc_out<bool> MArbiter::gnt_rp_tagr_r[CFG_MEMU_RPORTS]

◆ gnt_wp_bank

sc_out<bool> MArbiter::gnt_wp_bank[CFG_MEMU_WPORTS][CFG_MEMU_CACHE_BANKS]

◆ gnt_wp_busif

sc_out<bool> MArbiter::gnt_wp_busif[CFG_MEMU_WPORTS]

◆ gnt_wp_linelock

sc_out<bool> MArbiter::gnt_wp_linelock[CFG_MEMU_WPORTS]

◆ gnt_wp_tagr

sc_out<bool> MArbiter::gnt_wp_tagr[CFG_MEMU_WPORTS]

◆ gnt_wp_tagr_r

sc_out<bool> MArbiter::gnt_wp_tagr_r[CFG_MEMU_WPORTS]

◆ gnt_wp_tagw

sc_out<bool> MArbiter::gnt_wp_tagw[CFG_MEMU_WPORTS]

◆ gnt_wp_tagw_r

sc_out<bool> MArbiter::gnt_wp_tagw_r[CFG_MEMU_WPORTS]

◆ linelock_reg

sc_signal<sc_uint<CFG_MEMU_WPORTS + 1> > MArbiter::linelock_reg
protected

◆ linelock_sel

sc_module* MArbiter::linelock_sel
protected

◆ linelock_sel_in

sc_signal<SSelectorIO<1, CFG_MEMU_WPORTS> > MArbiter::linelock_sel_in[2]
protected

◆ linelock_sel_out

sc_signal<SSelectorIO<1, CFG_MEMU_WPORTS> > MArbiter::linelock_sel_out
protected

◆ next_bank_reg

sc_signal<sc_uint<((CFG_MEMU_RPORTS + CFG_MEMU_WPORTS+(CFG_NUT_CPU_CORES_LD==0)) / CFG_MEMU_BANK_RAM_PORTS) + 1> > MArbiter::next_bank_reg[CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]
protected

◆ next_busif_reg

sc_signal<sc_uint<CFG_MEMU_RPORTS + CFG_MEMU_WPORTS> > MArbiter::next_busif_reg
protected

◆ next_linelock_reg

sc_signal<sc_uint<CFG_MEMU_WPORTS + 1> > MArbiter::next_linelock_reg
protected

◆ next_req_tagw_reg

sc_signal<sc_uint<CFG_MEMU_WPORTS + 1> > MArbiter::next_req_tagw_reg
protected

◆ next_tagr_reg

sc_signal<sc_uint<CFG_MEMU_RPORTS + CFG_MEMU_WPORTS + 1> > MArbiter::next_tagr_reg
protected

◆ next_tagw_reg

sc_signal<sc_uint<CFG_MEMU_WPORTS + 1> > MArbiter::next_tagw_reg
protected

◆ req_busif_bank

sc_in<bool> MArbiter::req_busif_bank[CFG_MEMU_CACHE_BANKS]

◆ req_busif_linelock

sc_in<bool> MArbiter::req_busif_linelock

◆ req_busif_tagr

sc_in<bool> MArbiter::req_busif_tagr

◆ req_busif_tagw

sc_in<bool> MArbiter::req_busif_tagw

◆ req_rp_bank

sc_in<bool> MArbiter::req_rp_bank[CFG_MEMU_RPORTS][CFG_MEMU_CACHE_BANKS]

◆ req_rp_busif

sc_in<bool> MArbiter::req_rp_busif[CFG_MEMU_RPORTS]

◆ req_rp_tagr

sc_in<bool> MArbiter::req_rp_tagr[CFG_MEMU_RPORTS]

◆ req_tagw_reg

sc_signal<sc_uint<CFG_MEMU_WPORTS + 1> > MArbiter::req_tagw_reg
protected

◆ req_wp_bank

sc_in<bool> MArbiter::req_wp_bank[CFG_MEMU_WPORTS][CFG_MEMU_CACHE_BANKS]

◆ req_wp_busif

sc_in<bool> MArbiter::req_wp_busif[CFG_MEMU_WPORTS]

◆ req_wp_linelock

sc_in<bool> MArbiter::req_wp_linelock[CFG_MEMU_WPORTS]

◆ req_wp_tagr

sc_in<bool> MArbiter::req_wp_tagr[CFG_MEMU_WPORTS]

◆ req_wp_tagw

sc_in<bool> MArbiter::req_wp_tagw[CFG_MEMU_WPORTS]

◆ reset

sc_in<bool> MArbiter::reset

◆ SINGLE_CPU

const bool MArbiter::SINGLE_CPU = CFG_NUT_CPU_CORES == 1
staticprotected

◆ snoop_adr

sc_out<sc_uint<32> > MArbiter::snoop_adr

◆ snoop_stb

sc_out<bool> MArbiter::snoop_stb[CFG_MEMU_WPORTS]

◆ tagr_reg

sc_signal<sc_uint<CFG_MEMU_RPORTS + CFG_MEMU_WPORTS + 1> > MArbiter::tagr_reg
protected

◆ tagram_ready

sc_in<bool> MArbiter::tagram_ready

◆ tagw_reg

sc_signal<sc_uint<CFG_MEMU_WPORTS + 1> > MArbiter::tagw_reg
protected

◆ way_wp

sc_in<sc_uint<32> > MArbiter::way_wp[CFG_MEMU_WPORTS]

◆ wiadr_bank

sc_out<sc_uint<32> > MArbiter::wiadr_bank[CFG_MEMU_CACHE_BANKS][CFG_MEMU_BANK_RAM_PORTS]

◆ wiadr_busif

sc_in<sc_uint<32> > MArbiter::wiadr_busif

◆ wiadr_rp

sc_in<sc_uint<32> > MArbiter::wiadr_rp[CFG_MEMU_RPORTS]

The documentation for this class was generated from the following files: