ParaNut SystemC Model
A SystemC Model of the ParaNut architecture
Public Member Functions | Public Attributes | Protected Attributes | List of all members
MBankRam Class Reference

#include <memu.h>

Inheritance diagram for MBankRam:
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Collaboration diagram for MBankRam:
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Public Member Functions

 MBankRam (sc_module_name name)
 
void Trace (sc_trace_file *tf, int level=1)
 
void MainThread ()
 

Public Attributes

sc_in< bool > clk
 
sc_in< bool > rd [CFG_MEMU_BANK_RAM_PORTS]
 
sc_in< bool > wr [CFG_MEMU_BANK_RAM_PORTS]
 
sc_in< sc_uint< 4 > > wen [CFG_MEMU_BANK_RAM_PORTS]
 
sc_in< sc_uint< 32 > > wiadr [CFG_MEMU_BANK_RAM_PORTS]
 
sc_in< sc_uint< 32 > > wdata [CFG_MEMU_BANK_RAM_PORTS]
 
sc_out< sc_uint< 32 > > rdata [CFG_MEMU_BANK_RAM_PORTS]
 

Protected Attributes

sc_uint< 32 > ram_ [CFG_MEMU_CACHE_SETS *CFG_MEMU_CACHE_WAYS]
 

Constructor & Destructor Documentation

◆ MBankRam()

MBankRam::MBankRam ( sc_module_name  name)
inline

Member Function Documentation

◆ MainThread()

void MBankRam::MainThread ( )

◆ Trace()

void MBankRam::Trace ( sc_trace_file *  tf,
int  level = 1 
)

Member Data Documentation

◆ clk

sc_in<bool> MBankRam::clk

◆ ram_

sc_uint<32> MBankRam::ram_[CFG_MEMU_CACHE_SETS *CFG_MEMU_CACHE_WAYS]
protected

◆ rd

sc_in<bool> MBankRam::rd[CFG_MEMU_BANK_RAM_PORTS]

◆ rdata

sc_out<sc_uint<32> > MBankRam::rdata[CFG_MEMU_BANK_RAM_PORTS]

◆ wdata

sc_in<sc_uint<32> > MBankRam::wdata[CFG_MEMU_BANK_RAM_PORTS]

◆ wen

sc_in<sc_uint<4> > MBankRam::wen[CFG_MEMU_BANK_RAM_PORTS]

◆ wiadr

sc_in<sc_uint<32> > MBankRam::wiadr[CFG_MEMU_BANK_RAM_PORTS]

◆ wr

sc_in<bool> MBankRam::wr[CFG_MEMU_BANK_RAM_PORTS]

The documentation for this class was generated from the following files: